[PATCH] D110756: [X86][Costmodel] Load/store i32/f32 Stride=2 VF=16 interleaving costs

[Roman Lebedev via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG80cd8da78d02: [X86][Costmodel] Load/store i32/f32 Stride=2 VF=16 interleaving costs (authored by lebedev.ri).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D110756/new/

https://reviews.llvm.org/D110756

Files:
  llvm/lib/Target/X86/X86TargetTransformInfo.cpp
  llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-2.ll
  llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-2.ll
  llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-2.ll
  llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-2.ll


Index: llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-2.ll
===================================================================
--- llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-2.ll
+++ llvm/test/Analysis/CostModel/X86/interleaved-store-i32-stride-2.ll
@@ -29,7 +29,7 @@
 ; AVX2: LV: Found an estimated cost of 2 for VF 2 For instruction:   store i32 %v1, i32* %out1, align 4
 ; AVX2: LV: Found an estimated cost of 3 for VF 4 For instruction:   store i32 %v1, i32* %out1, align 4
 ; AVX2: LV: Found an estimated cost of 6 for VF 8 For instruction:   store i32 %v1, i32* %out1, align 4
-; AVX2: LV: Found an estimated cost of 92 for VF 16 For instruction:   store i32 %v1, i32* %out1, align 4
+; AVX2: LV: Found an estimated cost of 12 for VF 16 For instruction:   store i32 %v1, i32* %out1, align 4
 ; AVX2: LV: Found an estimated cost of 184 for VF 32 For instruction:   store i32 %v1, i32* %out1, align 4
 ;
 ; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction:   store i32 %v1, i32* %out1, align 4
Index: llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-2.ll
===================================================================
--- llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-2.ll
+++ llvm/test/Analysis/CostModel/X86/interleaved-store-f32-stride-2.ll
@@ -29,7 +29,7 @@
 ; AVX2: LV: Found an estimated cost of 2 for VF 2 For instruction:   store float %v1, float* %out1, align 4
 ; AVX2: LV: Found an estimated cost of 3 for VF 4 For instruction:   store float %v1, float* %out1, align 4
 ; AVX2: LV: Found an estimated cost of 6 for VF 8 For instruction:   store float %v1, float* %out1, align 4
-; AVX2: LV: Found an estimated cost of 76 for VF 16 For instruction:   store float %v1, float* %out1, align 4
+; AVX2: LV: Found an estimated cost of 12 for VF 16 For instruction:   store float %v1, float* %out1, align 4
 ; AVX2: LV: Found an estimated cost of 152 for VF 32 For instruction:   store float %v1, float* %out1, align 4
 ;
 ; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction:   store float %v1, float* %out1, align 4
Index: llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-2.ll
===================================================================
--- llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-2.ll
+++ llvm/test/Analysis/CostModel/X86/interleaved-load-i32-stride-2.ll
@@ -29,7 +29,7 @@
 ; AVX2: LV: Found an estimated cost of 3 for VF 2 For instruction:   %v0 = load i32, i32* %in0, align 4
 ; AVX2: LV: Found an estimated cost of 3 for VF 4 For instruction:   %v0 = load i32, i32* %in0, align 4
 ; AVX2: LV: Found an estimated cost of 6 for VF 8 For instruction:   %v0 = load i32, i32* %in0, align 4
-; AVX2: LV: Found an estimated cost of 92 for VF 16 For instruction:   %v0 = load i32, i32* %in0, align 4
+; AVX2: LV: Found an estimated cost of 12 for VF 16 For instruction:   %v0 = load i32, i32* %in0, align 4
 ; AVX2: LV: Found an estimated cost of 184 for VF 32 For instruction:   %v0 = load i32, i32* %in0, align 4
 ;
 ; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction:   %v0 = load i32, i32* %in0, align 4
Index: llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-2.ll
===================================================================
--- llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-2.ll
+++ llvm/test/Analysis/CostModel/X86/interleaved-load-f32-stride-2.ll
@@ -29,7 +29,7 @@
 ; AVX2: LV: Found an estimated cost of 3 for VF 2 For instruction:   %v0 = load float, float* %in0, align 4
 ; AVX2: LV: Found an estimated cost of 3 for VF 4 For instruction:   %v0 = load float, float* %in0, align 4
 ; AVX2: LV: Found an estimated cost of 6 for VF 8 For instruction:   %v0 = load float, float* %in0, align 4
-; AVX2: LV: Found an estimated cost of 76 for VF 16 For instruction:   %v0 = load float, float* %in0, align 4
+; AVX2: LV: Found an estimated cost of 12 for VF 16 For instruction:   %v0 = load float, float* %in0, align 4
 ; AVX2: LV: Found an estimated cost of 152 for VF 32 For instruction:   %v0 = load float, float* %in0, align 4
 ;
 ; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction:   %v0 = load float, float* %in0, align 4
Index: llvm/lib/Target/X86/X86TargetTransformInfo.cpp
===================================================================
--- llvm/lib/Target/X86/X86TargetTransformInfo.cpp
+++ llvm/lib/Target/X86/X86TargetTransformInfo.cpp
@@ -5078,6 +5078,7 @@
       {2, MVT::v2i32, 2}, // (load 4i32 and) deinterleave into 2 x 2i32
       {2, MVT::v4i32, 2}, // (load 8i32 and) deinterleave into 2 x 4i32
       {2, MVT::v8i32, 4}, // (load 16i32 and) deinterleave into 2 x 8i32
+      {2, MVT::v16i32, 8}, // (load 32i32 and) deinterleave into 2 x 16i32
 
       {2, MVT::v4i64, 6}, // (load 8i64 and) deinterleave into 2 x 4i64
 
@@ -5125,6 +5126,7 @@
       {2, MVT::v2i32, 1}, // interleave 2 x 2i32 into 4i32 (and store)
       {2, MVT::v4i32, 2}, // interleave 2 x 4i32 into 8i32 (and store)
       {2, MVT::v8i32, 4}, // interleave 2 x 8i32 into 16i32 (and store)
+      {2, MVT::v16i32, 8}, // interleave 2 x 16i32 into 32i32 (and store)
 
       {2, MVT::v4i64, 6}, // interleave 2 x 4i64 into 8i64 (and store)
 


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