[llvm] 612e5b0 - [X86][Costmodel] Load/store i64/f64 Stride=2 VF=2 interleaving costs
Roman Lebedev via llvm-commits
llvm-commits at lists.llvm.org
Fri Oct 1 07:49:19 PDT 2021
Author: Roman Lebedev
Date: 2021-10-01T17:48:14+03:00
New Revision: 612e5b05a281b867383f52e457781d1b5ba76c2d
URL: https://github.com/llvm/llvm-project/commit/612e5b05a281b867383f52e457781d1b5ba76c2d
DIFF: https://github.com/llvm/llvm-project/commit/612e5b05a281b867383f52e457781d1b5ba76c2d.diff
LOG: [X86][Costmodel] Load/store i64/f64 Stride=2 VF=2 interleaving costs
The only sched models that for cpu's that support avx2
but not avx512 are: haswell, broadwell, skylake, zen1-3
For load we have:
https://godbolt.org/z/8a1cfGeMn - for intels `Block RThroughput: =2.0`; for ryzens, `Block RThroughput: =1.0`
So pick cost of `2`.
For store we have:
https://godbolt.org/z/jMdcM47bx - for intels `Block RThroughput: =2.0`; for ryzens, `Block RThroughput: <=2.0`
So pick cost of `2`.
I'm directly using the shuffling asm the llc produced,
without any manual fixups that may be needed
to ensure sequential execution.
Reviewed By: RKSimon
Differential Revision: https://reviews.llvm.org/D110835
Added:
Modified:
llvm/lib/Target/X86/X86TargetTransformInfo.cpp
llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-2.ll
llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-2.ll
llvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-2.ll
llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-2.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
index 44b814d5dd5d6..f80b0013a91e9 100644
--- a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
+++ b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp
@@ -5081,6 +5081,7 @@ InstructionCost X86TTIImpl::getInterleavedMemoryOpCostAVX2(
{2, MVT::v16i32, 8}, // (load 32i32 and) deinterleave into 2 x 16i32
{2, MVT::v32i32, 16}, // (load 64i32 and) deinterleave into 2 x 32i32
+ {2, MVT::v2i64, 2}, // (load 4i64 and) deinterleave into 2 x 2i64
{2, MVT::v4i64, 6}, // (load 8i64 and) deinterleave into 2 x 4i64
{3, MVT::v2i8, 10}, // (load 6i8 and) deinterleave into 3 x 2i8
@@ -5130,6 +5131,7 @@ InstructionCost X86TTIImpl::getInterleavedMemoryOpCostAVX2(
{2, MVT::v16i32, 8}, // interleave 2 x 16i32 into 32i32 (and store)
{2, MVT::v32i32, 16}, // interleave 2 x 32i32 into 64i32 (and store)
+ {2, MVT::v2i64, 2}, // interleave 2 x 2i64 into 4i64 (and store)
{2, MVT::v4i64, 6}, // interleave 2 x 4i64 into 8i64 (and store)
{3, MVT::v2i8, 7}, // interleave 3 x 2i8 into 6i8 (and store)
diff --git a/llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-2.ll b/llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-2.ll
index b8b0e9511a0c3..c69f616252b03 100644
--- a/llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-2.ll
+++ b/llvm/test/Analysis/CostModel/X86/interleaved-load-f64-stride-2.ll
@@ -24,7 +24,7 @@ target triple = "x86_64-unknown-linux-gnu"
; AVX1: LV: Found an estimated cost of 64 for VF 16 For instruction: %v0 = load double, double* %in0, align 8
;;
; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load double, double* %in0, align 8
-; AVX2: LV: Found an estimated cost of 7 for VF 2 For instruction: %v0 = load double, double* %in0, align 8
+; AVX2: LV: Found an estimated cost of 3 for VF 2 For instruction: %v0 = load double, double* %in0, align 8
; AVX2: LV: Found an estimated cost of 8 for VF 4 For instruction: %v0 = load double, double* %in0, align 8
; AVX2: LV: Found an estimated cost of 32 for VF 8 For instruction: %v0 = load double, double* %in0, align 8
; AVX2: LV: Found an estimated cost of 64 for VF 16 For instruction: %v0 = load double, double* %in0, align 8
diff --git a/llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-2.ll b/llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-2.ll
index f318aa6b99d8a..be333a6419d1c 100644
--- a/llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-2.ll
+++ b/llvm/test/Analysis/CostModel/X86/interleaved-load-i64-stride-2.ll
@@ -24,7 +24,7 @@ target triple = "x86_64-unknown-linux-gnu"
; AVX1: LV: Found an estimated cost of 104 for VF 16 For instruction: %v0 = load i64, i64* %in0, align 8
;
; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: %v0 = load i64, i64* %in0, align 8
-; AVX2: LV: Found an estimated cost of 11 for VF 2 For instruction: %v0 = load i64, i64* %in0, align 8
+; AVX2: LV: Found an estimated cost of 3 for VF 2 For instruction: %v0 = load i64, i64* %in0, align 8
; AVX2: LV: Found an estimated cost of 8 for VF 4 For instruction: %v0 = load i64, i64* %in0, align 8
; AVX2: LV: Found an estimated cost of 52 for VF 8 For instruction: %v0 = load i64, i64* %in0, align 8
; AVX2: LV: Found an estimated cost of 104 for VF 16 For instruction: %v0 = load i64, i64* %in0, align 8
diff --git a/llvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-2.ll b/llvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-2.ll
index 6e1bbde249606..2f4e880bc713f 100644
--- a/llvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-2.ll
+++ b/llvm/test/Analysis/CostModel/X86/interleaved-store-f64-stride-2.ll
@@ -24,7 +24,7 @@ target triple = "x86_64-unknown-linux-gnu"
; AVX1: LV: Found an estimated cost of 64 for VF 16 For instruction: store double %v1, double* %out1, align 8
;
; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: store double %v1, double* %out1, align 8
-; AVX2: LV: Found an estimated cost of 6 for VF 2 For instruction: store double %v1, double* %out1, align 8
+; AVX2: LV: Found an estimated cost of 3 for VF 2 For instruction: store double %v1, double* %out1, align 8
; AVX2: LV: Found an estimated cost of 8 for VF 4 For instruction: store double %v1, double* %out1, align 8
; AVX2: LV: Found an estimated cost of 32 for VF 8 For instruction: store double %v1, double* %out1, align 8
; AVX2: LV: Found an estimated cost of 64 for VF 16 For instruction: store double %v1, double* %out1, align 8
diff --git a/llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-2.ll b/llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-2.ll
index f375344a30226..b5c5ab7395288 100644
--- a/llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-2.ll
+++ b/llvm/test/Analysis/CostModel/X86/interleaved-store-i64-stride-2.ll
@@ -24,7 +24,7 @@ target triple = "x86_64-unknown-linux-gnu"
; AVX1: LV: Found an estimated cost of 104 for VF 16 For instruction: store i64 %v1, i64* %out1, align 8
;
; AVX2: LV: Found an estimated cost of 1 for VF 1 For instruction: store i64 %v1, i64* %out1, align 8
-; AVX2: LV: Found an estimated cost of 11 for VF 2 For instruction: store i64 %v1, i64* %out1, align 8
+; AVX2: LV: Found an estimated cost of 3 for VF 2 For instruction: store i64 %v1, i64* %out1, align 8
; AVX2: LV: Found an estimated cost of 8 for VF 4 For instruction: store i64 %v1, i64* %out1, align 8
; AVX2: LV: Found an estimated cost of 52 for VF 8 For instruction: store i64 %v1, i64* %out1, align 8
; AVX2: LV: Found an estimated cost of 104 for VF 16 For instruction: store i64 %v1, i64* %out1, align 8
More information about the llvm-commits
mailing list