[PATCH] D105871: implementation of sdag support for VP memory intrinsics
Roger Ferrer Ibanez via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Oct 1 06:12:48 PDT 2021
rogfer01 added inline comments.
================
Comment at: llvm/include/llvm/CodeGen/SelectionDAGNodes.h:2354
+ const SDValue &getOffset() const {
+ return getOperand(getOpcode() == ISD::MLOAD ? 2 : 3);
+ }
----------------
frasercrmck wrote:
> rogfer01 wrote:
> > Sorry for reviving, this (I was working on a patch for strided load store).
> >
> > Shouldn't this have been `ISD::VP_LOAD` instead?
> Oh, good spot! I don't think anyone's using the shared base class (everyone uses the concrete subclasses which have their own `getOffset`.
>
> Do you want to submit a patch or shall I?
I created https://reviews.llvm.org/D110930
Thanks for the prompt reply!
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D105871/new/
https://reviews.llvm.org/D105871
More information about the llvm-commits
mailing list