[PATCH] D109146: [AArch64][SVE] Replace fmul, fadd and fsub LLVM IR instrinsics with LLVM IR binary ops

[David Sherwood via Phabricator via llvm-commits]

david-arm accepted this revision.
david-arm added a comment.
This revision is now accepted and ready to land.

LGTM! Thanks for making the changes.



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Comment at: llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-fma-binops.ll:10
+; SVE intrinsics fmul and fadd should be replaced with regular fmul and fadd
+declare <vscale x 8 x half> @llvm.aarch64.sve.fmul.nxv8f16(<vscale x 8 x i1>, <vscale x 8 x half>, <vscale x 8 x half>)
+define <vscale x 8 x half> @replace_fmul_intrinsic_half(<vscale x 8 x half> %a, <vscale x 8 x half> %b) #0 {
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nit: Could you change the test names before committing to have something different to the intrinsic name? i.e. you could replace the '.' with '_' so that you have

  declare <vscale x 8 x half> @llvm_aarch64_sve_fmul_nxv8f16(


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  https://reviews.llvm.org/D109146/new/

https://reviews.llvm.org/D109146