[llvm] 66c069d - [InstCombine] add tests for shift-trunc-shift; NFC

[Sanjay Patel via llvm-commits]

Author: Sanjay Patel
Date: 2021-09-30T15:06:13-04:00
New Revision: 66c069d7d626259d354c6fdac6b7d309b7963ed2

URL: https://github.com/llvm/llvm-project/commit/66c069d7d626259d354c6fdac6b7d309b7963ed2
DIFF: https://github.com/llvm/llvm-project/commit/66c069d7d626259d354c6fdac6b7d309b7963ed2.diff

LOG: [InstCombine] add tests for shift-trunc-shift; NFC

Added: 
    

Modified: 
    llvm/test/Transforms/InstCombine/shift-shift.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/InstCombine/shift-shift.ll b/llvm/test/Transforms/InstCombine/shift-shift.ll
index 163a396573438..7b933649b984b 100644
--- a/llvm/test/Transforms/InstCombine/shift-shift.ll
+++ b/llvm/test/Transforms/InstCombine/shift-shift.ll
@@ -163,6 +163,56 @@ define i8 @shl_trunc_smaller_lshr(i32 %x) {
   ret i8 %lt
 }
 
+define i24 @shl_trunc_bigger_ashr(i32 %x) {
+; CHECK-LABEL: @shl_trunc_bigger_ashr(
+; CHECK-NEXT:    [[TMP1:%.*]] = ashr i32 [[X:%.*]], 9
+; CHECK-NEXT:    [[TMP2:%.*]] = trunc i32 [[TMP1]] to i24
+; CHECK-NEXT:    [[LT:%.*]] = and i24 [[TMP2]], -8
+; CHECK-NEXT:    ret i24 [[LT]]
+;
+  %rt = ashr i32 %x, 12
+  %tr = trunc i32 %rt to i24
+  %lt = shl i24 %tr, 3
+  ret i24 %lt
+}
+
+define i24 @shl_trunc_smaller_ashr(i32 %x) {
+; CHECK-LABEL: @shl_trunc_smaller_ashr(
+; CHECK-NEXT:    [[X_TR:%.*]] = trunc i32 [[X:%.*]] to i24
+; CHECK-NEXT:    [[TMP1:%.*]] = shl i24 [[X_TR]], 3
+; CHECK-NEXT:    [[LT:%.*]] = and i24 [[TMP1]], -8192
+; CHECK-NEXT:    ret i24 [[LT]]
+;
+  %rt = ashr i32 %x, 10
+  %tr = trunc i32 %rt to i24
+  %lt = shl i24 %tr, 13
+  ret i24 %lt
+}
+
+define i8 @shl_trunc_bigger_shl(i32 %x) {
+; CHECK-LABEL: @shl_trunc_bigger_shl(
+; CHECK-NEXT:    [[X_TR:%.*]] = trunc i32 [[X:%.*]] to i8
+; CHECK-NEXT:    [[TR:%.*]] = shl i8 [[X_TR]], 6
+; CHECK-NEXT:    ret i8 [[TR]]
+;
+  %rt = shl i32 %x, 4
+  %tr = trunc i32 %rt to i8
+  %lt = shl i8 %tr, 2
+  ret i8 %lt
+}
+
+define i8 @shl_trunc_smaller_shl(i32 %x) {
+; CHECK-LABEL: @shl_trunc_smaller_shl(
+; CHECK-NEXT:    [[X_TR:%.*]] = trunc i32 [[X:%.*]] to i8
+; CHECK-NEXT:    [[TR:%.*]] = shl i8 [[X_TR]], 6
+; CHECK-NEXT:    ret i8 [[TR]]
+;
+  %rt = shl i32 %x, 2
+  %tr = trunc i32 %rt to i8
+  %lt = shl i8 %tr, 4
+  ret i8 %lt
+}
+
 define i8 @shl_trunc_bigger_lshr_use1(i32 %x) {
 ; CHECK-LABEL: @shl_trunc_bigger_lshr_use1(
 ; CHECK-NEXT:    [[RT:%.*]] = lshr i32 [[X:%.*]], 5