[PATCH] D110451: [IR] Increase max alignment to 4GB

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/include/llvm/IR/Value.h:788
   /// instructions, and global values.
-  static constexpr unsigned MaxAlignmentExponent = 30;
-  static constexpr unsigned MaximumAlignment = 1u << MaxAlignmentExponent;
+  static constexpr uint64_t MaxAlignmentExponent = 32;
+  static constexpr uint64_t MaximumAlignment = 1ULL << MaxAlignmentExponent;
----------------
MaxAlignmentExponent doesn't need to be uint64_t.


================
Comment at: llvm/lib/Transforms/Utils/Local.cpp:1352
   KnownBits Known = computeKnownBits(V, DL, 0, AC, CxtI, DT);
-  unsigned TrailZ = Known.countMinTrailingZeros();
+  uint64_t TrailZ = Known.countMinTrailingZeros();
 
----------------
This change doesn't seem necessary. KnownBits can't support a bit width of more than 2^32 - 1 bits.


================
Comment at: llvm/lib/Transforms/Utils/Local.cpp:1360
+  Align Alignment =
+      Align(1ull << std::min(uint64_t(Known.getBitWidth() - 1), TrailZ));
 
----------------
The shift amount here shouldn't need to be 64 bits.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D110451/new/

https://reviews.llvm.org/D110451