[PATCH] D106362: [FPEnv][InstSimplify] Enable more folds for constrained fadd

[Roman Lebedev via Phabricator via llvm-commits]

lebedev.ri added a comment.

In D106362#3033346 <https://reviews.llvm.org/D106362#3033346>, @sepavloff wrote:

> In D106362#3032900 <https://reviews.llvm.org/D106362#3032900>, @lebedev.ri wrote:
>
>> `fadd X, -0 ==> X` is *NOT* a miscompile, at least given the current LLVM IR semantics: https://alive2.llvm.org/ce/z/TuTiSQ
>> I would personally strongly suggest to not reason about semantics via hand-waving, but to actually model them in alive2, if it isn't already.
>> Honestly, i'm quite worried that this is repeating the same approach as in isnan threads.
>> Some might interpret it as being dismissive/intentionally ignoring documented semantics.
>
> Here is the sample program: https://godbolt.org/z/ssYs6ez91
> Hardware converts `SNaN + 0` into QNaN.

Could you please write a little longer arguments?
Your point being? Pick one of:

1. the optimization is incorrect as per the llvm langref
2. the optimization is correct as per the llvm langref, which is itself incorrect
3. ???

Which one is it?


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https://reviews.llvm.org/D106362