[PATCH] D110708: [X86][Costmodel] Load/store i8 Stride=2 VF=16 interleaving costs

Roman Lebedev via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Sep 29 11:53:40 PDT 2021


This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGbac60c55e0ff: [X86][Costmodel] Load/store i8 Stride=2 VF=16 interleaving costs (authored by lebedev.ri).

Changed prior to commit:
  https://reviews.llvm.org/D110708?vs=375851&id=375984#toc

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D110708/new/

https://reviews.llvm.org/D110708

Files:
  llvm/lib/Target/X86/X86TargetTransformInfo.cpp
  llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-2.ll
  llvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-2.ll


Index: llvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-2.ll
===================================================================
--- llvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-2.ll
+++ llvm/test/Analysis/CostModel/X86/interleaved-store-i8-stride-2.ll
@@ -29,7 +29,7 @@
 ; AVX2: LV: Found an estimated cost of 2 for VF 2 For instruction:   store i8 %v1, i8* %out1, align 1
 ; AVX2: LV: Found an estimated cost of 2 for VF 4 For instruction:   store i8 %v1, i8* %out1, align 1
 ; AVX2: LV: Found an estimated cost of 2 for VF 8 For instruction:   store i8 %v1, i8* %out1, align 1
-; AVX2: LV: Found an estimated cost of 67 for VF 16 For instruction:   store i8 %v1, i8* %out1, align 1
+; AVX2: LV: Found an estimated cost of 4 for VF 16 For instruction:   store i8 %v1, i8* %out1, align 1
 ; AVX2: LV: Found an estimated cost of 166 for VF 32 For instruction:   store i8 %v1, i8* %out1, align 1
 ;
 ; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction:   store i8 %v1, i8* %out1, align 1
Index: llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-2.ll
===================================================================
--- llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-2.ll
+++ llvm/test/Analysis/CostModel/X86/interleaved-load-i8-stride-2.ll
@@ -29,7 +29,7 @@
 ; AVX2: LV: Found an estimated cost of 3 for VF 2 For instruction:   %v0 = load i8, i8* %in0, align 1
 ; AVX2: LV: Found an estimated cost of 3 for VF 4 For instruction:   %v0 = load i8, i8* %in0, align 1
 ; AVX2: LV: Found an estimated cost of 3 for VF 8 For instruction:   %v0 = load i8, i8* %in0, align 1
-; AVX2: LV: Found an estimated cost of 81 for VF 16 For instruction:   %v0 = load i8, i8* %in0, align 1
+; AVX2: LV: Found an estimated cost of 5 for VF 16 For instruction:   %v0 = load i8, i8* %in0, align 1
 ; AVX2: LV: Found an estimated cost of 166 for VF 32 For instruction:   %v0 = load i8, i8* %in0, align 1
 ;
 ; AVX512: LV: Found an estimated cost of 1 for VF 1 For instruction:   %v0 = load i8, i8* %in0, align 1
Index: llvm/lib/Target/X86/X86TargetTransformInfo.cpp
===================================================================
--- llvm/lib/Target/X86/X86TargetTransformInfo.cpp
+++ llvm/lib/Target/X86/X86TargetTransformInfo.cpp
@@ -5066,6 +5066,7 @@
       {2, MVT::v2i8, 2},  // (load 4i8 and) deinterleave into 2 x 2i8
       {2, MVT::v4i8, 2},  // (load 8i8 and) deinterleave into 2 x 4i8
       {2, MVT::v8i8, 2},  // (load 16i8 and) deinterleave into 2 x 8i8
+      {2, MVT::v16i8, 4},  // (load 32i8 and) deinterleave into 2 x 16i8
 
       {2, MVT::v2i16, 2}, // (load 4i16 and) deinterleave into 2 x 2i16
       {2, MVT::v4i16, 2}, // (load 8i16 and) deinterleave into 2 x 4i16
@@ -5107,6 +5108,7 @@
       {2, MVT::v2i8, 1}, // interleave 2 x 2i8 into 4i8 (and store)
       {2, MVT::v4i8, 1}, // interleave 2 x 4i8 into 8i8 (and store)
       {2, MVT::v8i8, 1}, // interleave 2 x 8i8 into 16i8 (and store)
+      {2, MVT::v16i8, 3}, // interleave 2 x 16i8 into 32i8 (and store)
 
       {2, MVT::v2i16, 1}, // interleave 2 x 2i16 into 4i16 (and store)
       {2, MVT::v4i16, 1}, // interleave 2 x 4i16 into 8i16 (and store)


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