[PATCH] D110709: [X86][Costmodel] Load/store i8 Stride=2 VF=32 interleaving costs

Roman Lebedev via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Sep 29 11:48:57 PDT 2021


lebedev.ri added a comment.

In D110709#3031248 <https://reviews.llvm.org/D110709#3031248>, @RKSimon wrote:

> In D110709#3031066 <https://reviews.llvm.org/D110709#3031066>, @lebedev.ri wrote:
>
>> In D110709#3030657 <https://reviews.llvm.org/D110709#3030657>, @RKSimon wrote:
>>
>>> LGTM
>>
>> Thank you for the reviews!
>> Are there issues with VF=16 (D110708 <https://reviews.llvm.org/D110708>)?
>
> Sorry I missed that one!
>
>> After this, i will need to check double check but i believe, i will look into stride=2 for i32 and i64.
>> (i'm not just mass-adding these, at least so far, but only those that are queried in real code, and are missing)
>
> Improving i32/i64 + f32/f64 test + costs coverage would be great.



> Do you happen to know the relationship between these cost files and the interleaved test files in codegen\x86? They also have poor target coverage.

Define relationship? I just add new consistent test coverage (both codegen and costmodel) following a consistent naming model,
so we already have that coverage elsewhere, it should be removed in favor of the new coverage.
As for codegen tests, yes, there i only test AVX2 currently. We could extend it to test other ISA's.


Repository:
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  https://reviews.llvm.org/D110709/new/

https://reviews.llvm.org/D110709



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