[llvm] 241c7b1 - [AArch64][GlobalISel] Run overlapping_and after legalization
Jessica Paquette via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 28 17:13:59 PDT 2021
Author: Jessica Paquette
Date: 2021-09-28T17:13:34-07:00
New Revision: 241c7b1473edf25a978db745e8fbcc1f0d013b34
URL: https://github.com/llvm/llvm-project/commit/241c7b1473edf25a978db745e8fbcc1f0d013b34
DIFF: https://github.com/llvm/llvm-project/commit/241c7b1473edf25a978db745e8fbcc1f0d013b34.diff
LOG: [AArch64][GlobalISel] Run overlapping_and after legalization
When we have code with truncates, those truncates may be changed into G_ANDs
with constants. These may, in turn, feed into other G_AND instructions.
Running this combine post-legalize allows us to optimize examples like this one:
https://godbolt.org/z/zrGY4dfEW
SDAG currently optimizes the example above so that there is only one `and`.
GISel doesn't optimize it, because the G_AND we'd optimize here is translated
as a G_TRUNC. Later, that G_TRUNC is turned into a G_AND during legalization.
Differential Revision: https://reviews.llvm.org/D110667
Added:
llvm/test/CodeGen/AArch64/GlobalISel/opt-overlapping-and-postlegalize.mir
Modified:
llvm/lib/Target/AArch64/AArch64Combine.td
Removed:
################################################################################
diff --git a/llvm/lib/Target/AArch64/AArch64Combine.td b/llvm/lib/Target/AArch64/AArch64Combine.td
index 75ec7565b569..f702de60c0e4 100644
--- a/llvm/lib/Target/AArch64/AArch64Combine.td
+++ b/llvm/lib/Target/AArch64/AArch64Combine.td
@@ -213,6 +213,6 @@ def AArch64PostLegalizerCombinerHelper
icmp_to_true_false_known_bits, merge_unmerge,
select_combines, fold_merge_to_zext,
constant_fold, identity_combines,
- ptr_add_immed_chain]> {
+ ptr_add_immed_chain, overlapping_and]> {
let DisableRuleOption = "aarch64postlegalizercombiner-disable-rule";
}
diff --git a/llvm/test/CodeGen/AArch64/GlobalISel/opt-overlapping-and-postlegalize.mir b/llvm/test/CodeGen/AArch64/GlobalISel/opt-overlapping-and-postlegalize.mir
new file mode 100644
index 000000000000..602084ec8d8b
--- /dev/null
+++ b/llvm/test/CodeGen/AArch64/GlobalISel/opt-overlapping-and-postlegalize.mir
@@ -0,0 +1,30 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -debugify-and-strip-all-safe -mtriple arm64-apple-ios -O0 -run-pass=aarch64-postlegalizer-combiner --aarch64postlegalizercombinerhelper-only-enable-rule="overlapping_and" -global-isel -verify-machineinstrs %s -o - | FileCheck %s
+# REQUIRES: asserts
+
+# Test running the overlapping_and combine post-legalization.
+
+...
+---
+name: test
+legalized: true
+tracksRegLiveness: true
+body: |
+ bb.0:
+ liveins: $w0
+ ; CHECK-LABEL: name: test
+ ; CHECK: liveins: $w0
+ ; CHECK-NEXT: {{ $}}
+ ; CHECK-NEXT: %copy:_(s32) = COPY $w0
+ ; CHECK-NEXT: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 192
+ ; CHECK-NEXT: %and2:_(s32) = G_AND %copy, [[C]]
+ ; CHECK-NEXT: $w0 = COPY %and2(s32)
+ ; CHECK-NEXT: RET_ReallyLR implicit $w0
+ %copy:_(s32) = COPY $w0
+ %cst_neg_64:_(s32) = G_CONSTANT i32 -64
+ %and1:_(s32) = G_AND %copy, %cst_neg_64
+ %cst_255:_(s32) = G_CONSTANT i32 255
+ %and2:_(s32) = G_AND %and1, %cst_255
+ $w0 = COPY %and2(s32)
+ RET_ReallyLR implicit $w0
+...
More information about the llvm-commits
mailing list