[PATCH] D109318: [RISCV][NFC] Refactor classes for load/store instructions of V extension
Bin Cheng via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 28 09:11:05 PDT 2021
bin.cheng marked 8 inline comments as done.
bin.cheng added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfoV.td:204
+
// store vd, vs3, (rs1)
class VUnitStrideStoreMask<string opcodestr>
----------------
HsiangKai wrote:
> unit-stride masked store
> unit-stride masked store
I am using "unit-stride mask store" to be consistent with spec.
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D109318/new/
https://reviews.llvm.org/D109318
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