[PATCH] D110524: [AArch64ISelLowering] Avoid duplane in some cases when sve enabled
guopeilin via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 28 04:05:24 PDT 2021
guopeilin added a comment.
================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:9470
+ auto ExtractedValTye = V.getOperand(0).getValueType();
+ if (ExtractedValTye.getSizeInBits().getValue() <= 128) {
+ Lane += V.getConstantOperandVal(1);
----------------
david-arm wrote:
> This isn't safe for truly scalable vectors where the size is unknown at runtime. I think this should probably be written as:
>
> auto ExtractedValType = V.getOperand(0).getValueType();
> if (ExtractedValType.isFixedLengthVector() && ExtractedValType.getFixedSizeInBits() <= 128) {
> ...
> }
>
>
>
Fixed, please review
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D110524/new/
https://reviews.llvm.org/D110524
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