[PATCH] D110579: [AMDGPU] Add two new intrinsics to control fp_trunc rounding mode

[David Stuttard via Phabricator via llvm-commits]

dstuttard added inline comments.


================
Comment at: llvm/test/CodeGen/AMDGPU/llvm.experimental.fptrunc.round.ll:38
+; CHECK-NEXT:    v_cvt_f16_f32_e32 v2, v1
+; CHECK-NEXT:    s_round_mode 0x0
+; CHECK-NEXT:    s_round_mode 0x8
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Is there a reason why we couldn't make this a single s_round_mode 0x8 rather than going via s_round_mode 0x0?



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  https://reviews.llvm.org/D110579/new/

https://reviews.llvm.org/D110579