[PATCH] D110537: [X86][Costmodel] Load/store i16 Stride=4 VF=4 interleaving costs

[Roman Lebedev via Phabricator via llvm-commits]

This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rGdf2b42d12e4b: [X86][Costmodel] Load/store i16 Stride=4 VF=4 interleaving costs (authored by lebedev.ri).

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D110537/new/

https://reviews.llvm.org/D110537

Files:
  llvm/lib/Target/X86/X86TargetTransformInfo.cpp
  llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-4.ll
  llvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-4.ll


Index: llvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-4.ll
===================================================================
--- llvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-4.ll
+++ llvm/test/Analysis/CostModel/X86/interleaved-store-i16-stride-4.ll
@@ -10,7 +10,7 @@
 ; CHECK: LV: Checking a loop in "test"
 ; CHECK: LV: Found an estimated cost of 1 for VF 1 For instruction:   store i16 %v3, i16* %out3, align 2
 ; CHECK: LV: Found an estimated cost of 3 for VF 2 For instruction:   store i16 %v3, i16* %out3, align 2
-; CHECK: LV: Found an estimated cost of 49 for VF 4 For instruction:   store i16 %v3, i16* %out3, align 2
+; CHECK: LV: Found an estimated cost of 7 for VF 4 For instruction:   store i16 %v3, i16* %out3, align 2
 ; CHECK: LV: Found an estimated cost of 98 for VF 8 For instruction:   store i16 %v3, i16* %out3, align 2
 ; CHECK: LV: Found an estimated cost of 228 for VF 16 For instruction:   store i16 %v3, i16* %out3, align 2
 ; CHECK: LV: Found an estimated cost of 456 for VF 32 For instruction:   store i16 %v3, i16* %out3, align 2
Index: llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-4.ll
===================================================================
--- llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-4.ll
+++ llvm/test/Analysis/CostModel/X86/interleaved-load-i16-stride-4.ll
@@ -10,7 +10,7 @@
 ; CHECK: LV: Checking a loop in "test"
 ; CHECK: LV: Found an estimated cost of 1 for VF 1 For instruction:   %v0 = load i16, i16* %in0, align 2
 ; CHECK: LV: Found an estimated cost of 7 for VF 2 For instruction:   %v0 = load i16, i16* %in0, align 2
-; CHECK: LV: Found an estimated cost of 41 for VF 4 For instruction:   %v0 = load i16, i16* %in0, align 2
+; CHECK: LV: Found an estimated cost of 18 for VF 4 For instruction:   %v0 = load i16, i16* %in0, align 2
 ; CHECK: LV: Found an estimated cost of 82 for VF 8 For instruction:   %v0 = load i16, i16* %in0, align 2
 ; CHECK: LV: Found an estimated cost of 228 for VF 16 For instruction:   %v0 = load i16, i16* %in0, align 2
 ; CHECK: LV: Found an estimated cost of 456 for VF 32 For instruction:   %v0 = load i16, i16* %in0, align 2
Index: llvm/lib/Target/X86/X86TargetTransformInfo.cpp
===================================================================
--- llvm/lib/Target/X86/X86TargetTransformInfo.cpp
+++ llvm/lib/Target/X86/X86TargetTransformInfo.cpp
@@ -5086,6 +5086,7 @@
       {4, MVT::v32i8, 80}, // (load 128i8 and) deinterleave into 4 x 32i8
 
       {4, MVT::v2i16, 6}, // (load 8i16 and) deinterleave into 4 x 2i16
+      {4, MVT::v4i16, 17}, // (load 16i16 and) deinterleave into 4 x 4i16
 
       {8, MVT::v8i32, 40} // (load 64i32 and) deinterleave into 8 x 8i32
   };
@@ -5112,6 +5113,7 @@
       {4, MVT::v32i8, 12}, // interleave 4 x 32i8 into 128i8 (and store)
 
       {4, MVT::v2i16, 2},  // interleave 4 x 2i16 into 8i16 (and store)
+      {4, MVT::v4i16, 6},  // interleave 4 x 4i16 into 16i16 (and store)
   };
 
   if (Opcode == Instruction::Load) {


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