[llvm] b75ed24 - [InstCombine] add tests for shl-of-sub; NFC

Sanjay Patel via llvm-commits llvm-commits at lists.llvm.org
Mon Sep 27 12:01:41 PDT 2021


Author: Sanjay Patel
Date: 2021-09-27T14:56:01-04:00
New Revision: b75ed244afd5628b3e6425d8373304259d41ccea

URL: https://github.com/llvm/llvm-project/commit/b75ed244afd5628b3e6425d8373304259d41ccea
DIFF: https://github.com/llvm/llvm-project/commit/b75ed244afd5628b3e6425d8373304259d41ccea.diff

LOG: [InstCombine] add tests for shl-of-sub; NFC

Added: 
    

Modified: 
    llvm/test/Transforms/InstCombine/shl-sub.ll

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/InstCombine/shl-sub.ll b/llvm/test/Transforms/InstCombine/shl-sub.ll
index 4845474695d0..f9c97c7d8d0f 100644
--- a/llvm/test/Transforms/InstCombine/shl-sub.ll
+++ b/llvm/test/Transforms/InstCombine/shl-sub.ll
@@ -1,6 +1,8 @@
 ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
 ; RUN: opt -instcombine -S < %s | FileCheck %s
 
+declare void @use(i32)
+
 define i32 @shl_sub_i32(i32 %x) {
 ; CHECK-LABEL: @shl_sub_i32(
 ; CHECK-NEXT:    [[R:%.*]] = lshr i32 -2147483648, [[X:%.*]]
@@ -176,5 +178,37 @@ define <3 x i64> @shl_sub_i64_vec_undef_bad2(<3 x i64> %x) {
   ret <3 x i64> %r
 }
 
+define i32 @shl_const_op1_sub_const_op0(i32 %x) {
+; CHECK-LABEL: @shl_const_op1_sub_const_op0(
+; CHECK-NEXT:    [[S_NEG:%.*]] = mul i32 [[X:%.*]], -8
+; CHECK-NEXT:    [[R:%.*]] = add i32 [[S_NEG]], 336
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %s = sub i32 42, %x
+  %r = shl i32 %s, 3
+  ret i32 %r
+}
 
-declare void @use(i32)
+define <2 x i32> @shl_const_op1_sub_const_op0_splat(<2 x i32> %x) {
+; CHECK-LABEL: @shl_const_op1_sub_const_op0_splat(
+; CHECK-NEXT:    [[S_NEG:%.*]] = mul <2 x i32> [[X:%.*]], <i32 -8, i32 -8>
+; CHECK-NEXT:    [[R:%.*]] = add <2 x i32> [[S_NEG]], <i32 336, i32 336>
+; CHECK-NEXT:    ret <2 x i32> [[R]]
+;
+  %s = sub <2 x i32> <i32 42, i32 42>, %x
+  %r = shl <2 x i32> %s, <i32 3, i32 3>
+  ret <2 x i32> %r
+}
+
+define i32 @shl_const_op1_sub_const_op0_use(i32 %x) {
+; CHECK-LABEL: @shl_const_op1_sub_const_op0_use(
+; CHECK-NEXT:    [[S:%.*]] = sub i32 42, [[X:%.*]]
+; CHECK-NEXT:    call void @use(i32 [[S]])
+; CHECK-NEXT:    [[R:%.*]] = shl i32 [[S]], 3
+; CHECK-NEXT:    ret i32 [[R]]
+;
+  %s = sub i32 42, %x
+  call void @use(i32 %s)
+  %r = shl i32 %s, 3
+  ret i32 %r
+}


        


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