[PATCH] D109920: [PowerPC] Fix td pattern for P10 VSLDBI and VSRDBI
Quinn Pham via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 27 10:36:26 PDT 2021
This revision was landed with ongoing or failed builds.
This revision was automatically updated to reflect the committed changes.
Closed by commit rG682e15f371db: [PowerPC] Fix td pattern for P10 VSLDBI and VSRDBI (authored by quinnp).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D109920/new/
https://reviews.llvm.org/D109920
Files:
llvm/lib/Target/PowerPC/PPCInstrPrefix.td
Index: llvm/lib/Target/PowerPC/PPCInstrPrefix.td
===================================================================
--- llvm/lib/Target/PowerPC/PPCInstrPrefix.td
+++ llvm/lib/Target/PowerPC/PPCInstrPrefix.td
@@ -1927,7 +1927,7 @@
[(set v16i8:$VRT,
(int_ppc_altivec_vsldbi v16i8:$VRA,
v16i8:$VRB,
- i32:$SH))]>;
+ timm:$SH))]>;
def VSRDBI : VNForm_VTAB5_SD3<22, 1, (outs vrrc:$VRT),
(ins vrrc:$VRA, vrrc:$VRB, u3imm:$SH),
"vsrdbi $VRT, $VRA, $VRB, $SH",
@@ -1935,7 +1935,7 @@
[(set v16i8:$VRT,
(int_ppc_altivec_vsrdbi v16i8:$VRA,
v16i8:$VRB,
- i32:$SH))]>;
+ timm:$SH))]>;
defm VSTRIBR : VXForm_VTB5_RCr<13, 1, (outs vrrc:$vT), (ins vrrc:$vB),
"vstribr", "$vT, $vB", IIC_VecGeneral,
[(set v16i8:$vT,
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