[PATCH] D110542: [LiveIntervals] Remove unused subreg ranges in eliminateRegSequence

[Jay Foad via Phabricator via llvm-commits]

foad created this revision.
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In TwoAddressInstructionPass::eliminateRegSequence, if a use operand in
the REG_SEQUENCE has the undef flag then we don't generate a copy for it
so after the elimination there should be no live interval at all for
the corresponding subreg of the def. Update the LiveIntervals correctly
by removing any existing subrange for that subreg.

This is a small step towards switching TwoAddressInstructionPass over
from LiveVariables to LiveIntervals. Currently this path is only tested
if you explicitly enable -early-live-intervals.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D110542

Files:
  llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
  llvm/test/CodeGen/AMDGPU/dead-lane.mir


Index: llvm/test/CodeGen/AMDGPU/dead-lane.mir
===================================================================
--- llvm/test/CodeGen/AMDGPU/dead-lane.mir
+++ llvm/test/CodeGen/AMDGPU/dead-lane.mir
@@ -1,4 +1,5 @@
 # RUN: llc -march=amdgcn -mcpu=tonga %s -start-before detect-dead-lanes -stop-before machine-scheduler -verify-machineinstrs -o - | FileCheck -check-prefix=GCN %s
+# RUN: llc -march=amdgcn -mcpu=tonga %s -start-before detect-dead-lanes -stop-before machine-scheduler -verify-machineinstrs -early-live-intervals -o - | FileCheck -check-prefix=GCN %s
 
 # GCN-LABEL: name: dead_lane
 # GCN:      bb.0:
Index: llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
===================================================================
--- llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
+++ llvm/lib/CodeGen/TwoAddressInstructionPass.cpp
@@ -1661,10 +1661,12 @@
   }
 
   SmallVector<Register, 4> OrigRegs;
+  LiveInterval *DstLI = nullptr;
   if (LIS) {
     OrigRegs.push_back(MI.getOperand(0).getReg());
     for (unsigned i = 1, e = MI.getNumOperands(); i < e; i += 2)
       OrigRegs.push_back(MI.getOperand(i).getReg());
+    DstLI = &LIS->getInterval(DstReg);
   }
 
   bool DefEmitted = false;
@@ -1672,9 +1674,20 @@
     MachineOperand &UseMO = MI.getOperand(i);
     Register SrcReg = UseMO.getReg();
     unsigned SubIdx = MI.getOperand(i+1).getImm();
+
     // Nothing needs to be inserted for undef operands.
-    if (UseMO.isUndef())
+    if (UseMO.isUndef()) {
+      // Update LiveIntervals by removing any existing subrange for this subreg.
+      // If the subrange becomes empty it will be removed below.
+      if (DstLI) {
+        LaneBitmask LaneMask = TRI->getSubRegIndexLaneMask(SubIdx);
+        for (auto &S : DstLI->subranges()) {
+          if (S.LaneMask == LaneMask)
+            S.removeSegment(S.find(LIS->getInstructionIndex(MI)));
+        }
+      }
       continue;
+    }
 
     // Defer any kill flag to the last operand using SrcReg. Otherwise, we
     // might insert a COPY that uses SrcReg after is was killed.
@@ -1709,6 +1722,8 @@
 
     LLVM_DEBUG(dbgs() << "Inserted: " << *CopyMI);
   }
+  if (DstLI)
+    DstLI->removeEmptySubRanges();
 
   MachineBasicBlock::iterator EndMBBI =
       std::next(MachineBasicBlock::iterator(MI));
@@ -1726,7 +1741,7 @@
     MI.eraseFromParent();
   }
 
-  // Udpate LiveIntervals.
+  // Update LiveIntervals.
   if (LIS)
     LIS->repairIntervalsInRange(MBB, MBBI, EndMBBI, OrigRegs);
 }


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