[PATCH] D109963: [AArch64] Split bitmask immediate of bitwise AND operation

[Dave Green via Phabricator via llvm-commits]

dmgreen added inline comments.


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Comment at: llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp:97
+
+  // If the MOV has multiple uses, do not split the immediate becasue it causes
+  // more instructions.
----------------
"because"


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Comment at: llvm/lib/Target/AArch64/MCTargetDesc/AArch64AddressingModes.h:342
+template <typename T>
+static inline bool isValidAndSplitBitmaskImm(T Imm, unsigned regSize) {
+  assert((regSize == 32 || regSize == 64) &&
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jaykang10 wrote:
> dmgreen wrote:
> > jaykang10 wrote:
> > > dmgreen wrote:
> > > > This can move into the peephole optimization pass now, which might allow it to be simplified somewhat.
> > > This function could be used on other places. If possible, I would like to keep this check here conservatively.
> > What other places do you expect it to be used?
> > 
> > It seems at the moment, with the way these are called they will be re-calculating the same values repeatedly. That was unavoidable from tablegen patterns, but shouldn't be necessary from the new Peephole pass, hopefully.
> You are right! Let me move it to the peephole pass.
Was this going to be moved?


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  https://reviews.llvm.org/D109963/new/

https://reviews.llvm.org/D109963