[PATCH] D110319: [SelectionDAG] Fixed the scalable vectors issue on WidenVecRes_OverflowOp&WidenVecRes_SELECT

[eric tang via Phabricator via llvm-commits]

tangxingxin1008 added a comment.

For SetWidenedVector, this change reduced the restrictions. In AArch64 sve, normally,  SetWidenedVector only support nxv1i1 -> nxv2i1,  after this change,  the nxv1i1 -> nxv4i1, nxv1i1 -> nxv8i1, nxv1i1 -> nxv16i1 can also work.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D110319/new/

https://reviews.llvm.org/D110319