[PATCH] D109300: [AMDGPU] Make vector superclasses allocatable

Fri Sep 24 13:35:06 PDT 2021

rampitec added a comment.

In D109300#3021666 <https://reviews.llvm.org/D109300#3021666>, @arsenm wrote:

> In D109300#3019936 <https://reviews.llvm.org/D109300#3019936>, @cdevadas wrote:
>
>> In D109300#3018937 <https://reviews.llvm.org/D109300#3018937>, @rampitec wrote:
>>
>>> Thanks. FoldImmediate() and Global ISel seems to be last issue to me.
>>
>> The MAIInst uses AVSrc_32 for src0 & src1 operands.
>> https://github.com/llvm/llvm-project/blob/main/llvm/lib/Target/AMDGPU/VOP3PInstructions.td#L378
>>
>> I am not sure we can do something to prevent GIsel from choosing AV classes here.
>> Yes, the w/a in FoldImmediate was done to adjust the register class as per the opcode we choose.
>
> Regbankselect is only implemented in a way that should just work and is probably not optimal. In the future we could improve the selector to take the hint of the incoming bank to select the specific A/V class

The problem is exactly it does not work if AV is selected. This needs to be resolved to V or A at selection, otherwise you get a compilation crash (and actually cannot reasonably select related instructions, it will not work).

Repository:
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https://reviews.llvm.org/D109300