[PATCH] D109963: [AArch64] Split bitmask immediate of bitwise AND operation

JinGu Kang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Sep 24 04:25:46 PDT 2021


jaykang10 added inline comments.


================
Comment at: llvm/lib/Target/AArch64/AArch64MIPeepholeOpt.cpp:129
+  // If mov instruction has one use, delete it.
+  if (MRI->hasOneUse(DefMI->getOperand(0).getReg()))
+    ToBeRemoved.push_back(DefMI);
----------------
jaykang10 wrote:
> dmgreen wrote:
> > jaykang10 wrote:
> > > dmgreen wrote:
> > > > jaykang10 wrote:
> > > > > dmgreen wrote:
> > > > > > Should this transform be done with multiple uses on the mov?
> > > > > I thought there could be other opportunities with two bitmask immediate and other bitwise operations like `OR`. If possible, I would like to keep the MOV for the potential opportunities.
> > > > Yeah that might well happen. Do you have any tests? Maybe in an unrolled loop?
> > > I do not have test cases yet. I could try to split the bitmask more later.
> > I just think it's worth having some tests to show this is working as intended. Maybe where the other uses are transformed and where they are not. (Ignore the unrolled loop comment - it wouldn't trigger in a loop).
> Let me add a simple test in which `and` and `or` use same constant.
Sorry, I was wrong... Let's see below example.
```
define void @test10(i32* nocapture %x, i32* nocapture readonly %y, i32* nocapture %z) {
entry:
  %0 = load i32, i32* %y, align 4
  %and = and i32 %0, 2098176
  store i32 %and, i32* %x, align 4
  %1 = load i32, i32* %y, align 4
  %or = or i32 %1, 2098176
  store i32 %or, i32* %z, align 4
  ret void
}
```
After instruction selection, the MIR is as below.
```
; %4:gpr32 = MOVi32imm 2098176
; %5:gpr32 = ANDWrr killed %3:gpr32, %4:gpr32
; STRWui killed %5:gpr32, %0:gpr64common, 0 :: (store (s32) into %ir.x, !tbaa !8) 
; %6:gpr32 = LDRWui %1:gpr64common, 0 :: (load (s32) from %ir.y, !tbaa !8) 
; %7:gpr32 = ORRWrr killed %6:gpr32, %4:gpr32
```
We can see the `and` and `or` share the constant. The final assembly  is as below.
```
	mov	w9, #1024
	movk	w9, #32, lsl #16
	and	w8, w8, #0x3ffc00
	and	w8, w8, #0xffe007ff
	str	w8, [x0]
	ldr	w8, [x1]
	orr	w8, w8, w9
```
If there are multiple uses of the constant, we should not split the constant because it could cause more instructions as above. I am sorry for mistake. Let me update code.


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https://reviews.llvm.org/D109963



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