[PATCH] D110308: [RISCV] Add invalid match case for uimm2, uimm3 and uimm7
Jessica Clarke via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Sep 23 21:59:49 PDT 2021
jrtc27 requested changes to this revision.
jrtc27 added inline comments.
This revision now requires changes to proceed.
================
Comment at: llvm/lib/Target/RISCV/RISCVInstrInfo.td:923
// Accept 4 register form of ".insn r" as alias for ".insn r4".
-def : InstAlias<".insn_r $opcode, $funct3, $funct7, $rd, $rs1, $rs2, $rs3",
- (InsnR4 AnyReg:$rd, uimm7:$opcode, uimm3:$funct3, uimm7:$funct7,
+def : InstAlias<".insn_r $opcode, $funct3, $funct2, $rd, $rs1, $rs2, $rs3",
+ (InsnR4 AnyReg:$rd, uimm7:$opcode, uimm3:$funct3, uimm2:$funct2,
----------------
You had a LGTM and now you're breaking thing by uploading new revisions that change this? R-type instructions have a funct7 field, not a funct2 field. I don't understand what you're doing here.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D110308/new/
https://reviews.llvm.org/D110308
More information about the llvm-commits
mailing list