[PATCH] D110336: [X86][FP16] Add more builtins to avoid multi evaluation problems & add 2 missed intrinsics
Pengfei Wang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Sep 23 18:06:33 PDT 2021
pengfei added inline comments.
================
Comment at: clang/include/clang/Basic/BuiltinsX86.def:2021
TARGET_BUILTIN(__builtin_ia32_vfmaddcph256_maskz, "V8fV8fV8fV8fUc", "ncV:256:", "avx512fp16,avx512vl")
-TARGET_BUILTIN(__builtin_ia32_vfmaddcph512_mask, "V16fV16fV16fV16fUsIi", "ncV:512:", "avx512fp16")
+TARGET_BUILTIN(__builtin_ia32_vfmaddcph512_mask, "V16fV16fUsV16fV16fIi", "ncV:512:", "avx512fp16")
TARGET_BUILTIN(__builtin_ia32_vfmaddcph512_maskz, "V16fV16fV16fV16fUsIi", "ncV:512:", "avx512fp16")
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craig.topper wrote:
> Why move the mask? Its always the last or second to last operand on most if not all builtins.
Just noticed that. Thanks Craig!
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Comment at: clang/lib/Headers/avx512fp16intrin.h:3003
+static __inline__ __m128h __DEFAULT_FN_ATTRS128
+_mm_mask3_fmadd_sch(__m128h __A, __m128h __B, __m128h __C, __mmask8 __U) {
+ return (__m128h)__builtin_ia32_vfmaddcsh_round_mask3(
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craig.topper wrote:
> This isn't in the intrinsics guide.
We update the source of intrinsics guide at the same time when we adding new intrinsics. But there's delay between they are displayed on website. I will discuss with website maintainer about the release period.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D110336/new/
https://reviews.llvm.org/D110336
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