[PATCH] D110053: [AMDGPU] Add a regclass flag for scalar registers

[Stanislav Mekhanoshin via Phabricator via llvm-commits]

rampitec added inline comments.


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Comment at: llvm/lib/Target/AMDGPU/SIRegisterInfo.td:138
+  // TODO: This flag is currently set for all regclasses other than vectors.
+  // Some of them aren't truly GPRs, TTMP for instance. It won't be a problem
+  // as long as they remain unallocatable.
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cdevadas wrote:
> rampitec wrote:
> > TTMP is scalar.
> I will use another reference.
I think you can just drop the comment. There does not seem to be a TODO here.
Otherwise LGTM.


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  https://reviews.llvm.org/D110053/new/

https://reviews.llvm.org/D110053