[PATCH] D105659: [PowerPC][AIX] Support ByVals with greater alignment then pointer size

[Chris Bowler via Phabricator via llvm-commits]

cebowleratibm requested changes to this revision.
cebowleratibm added a comment.
This revision now requires changes to proceed.

As we lift the backend fatal error we expose the risk of generating silently incompatible code with the XLC compiler on AIX.  I think a clang warning diagnostic is warranted for 16 byte aligned byval args where the struct is 16 byte aligned and does not contain a vector member.  I don't think this case is common so the diagnostic shouldn't be too verbose.

I consider the insufficiently aligned address of the parameter an XLC bug and this change makes clang consistent with GCC on AIX, so I agree with the intention of the change.

If you agree with the clang diagnostic, I think it's better to land that before committing this just so that we don't expose ourselves to emitting silently incompatible code.



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Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:6570
       report_fatal_error("Pass-by-value arguments with alignment greater than "
-                         "register width are not supported.");
+                         "16 are not supported.");
 
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nit: emit the value "16" based on the value of StackAlign rather than hardcoding 16 again.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D105659/new/

https://reviews.llvm.org/D105659