[PATCH] D105092: [RISCV] (1/2) Add the tail policy argument to builtins/intrinsics.
Hsiangkai Wang via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Sep 23 02:09:51 PDT 2021
HsiangKai added inline comments.
================
Comment at: llvm/include/llvm/IR/IntrinsicsRISCV.td:162
// For unit stride load with mask
// Input: (maskedoff, pointer, mask, vl)
class RISCVUSLoadMask
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khchen wrote:
> maybe we could have another NFC patch to update those `argument info` comments.
I will update these comments. Thanks.
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D105092/new/
https://reviews.llvm.org/D105092
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