[llvm] 3b12282 - [AArch64][SVE][InstCombine] Eliminate redundant chains of tuple get/set
Usman Nadeem via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 22 21:27:29 PDT 2021
Author: Usman Nadeem
Date: 2021-09-22T20:59:46-07:00
New Revision: 3b12282b0ed738f138229993505fbba23cd534a2
URL: https://github.com/llvm/llvm-project/commit/3b12282b0ed738f138229993505fbba23cd534a2
DIFF: https://github.com/llvm/llvm-project/commit/3b12282b0ed738f138229993505fbba23cd534a2.diff
LOG: [AArch64][SVE][InstCombine] Eliminate redundant chains of tuple get/set
Differential Revision: https://reviews.llvm.org/D109667
Change-Id: I06a3c28e3658ecda109a3a1b73265828274ab2ea
Added:
llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-opts-tuple-get.ll
Modified:
llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
Removed:
################################################################################
diff --git a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
index bc0ff7dda22bd..87ff9393f0894 100644
--- a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.cpp
@@ -792,6 +792,32 @@ static Optional<Instruction *> instCombineSVETBL(InstCombiner &IC,
return IC.replaceInstUsesWith(II, VectorSplat);
}
+static Optional<Instruction *> instCombineSVETupleGet(InstCombiner &IC,
+ IntrinsicInst &II) {
+ // Try to remove sequences of tuple get/set.
+ Value *SetTuple, *SetIndex, *SetValue;
+ auto *GetTuple = II.getArgOperand(0);
+ auto *GetIndex = II.getArgOperand(1);
+ // Check that we have tuple_get(GetTuple, GetIndex) where GetTuple is a
+ // call to tuple_set i.e. tuple_set(SetTuple, SetIndex, SetValue).
+ // Make sure that the types of the current intrinsic and SetValue match
+ // in order to safely remove the sequence.
+ if (!match(GetTuple,
+ m_Intrinsic<Intrinsic::aarch64_sve_tuple_set>(
+ m_Value(SetTuple), m_Value(SetIndex), m_Value(SetValue))) ||
+ SetValue->getType() != II.getType())
+ return None;
+ // Case where we get the same index right after setting it.
+ // tuple_get(tuple_set(SetTuple, SetIndex, SetValue), GetIndex) --> SetValue
+ if (GetIndex == SetIndex)
+ return IC.replaceInstUsesWith(II, SetValue);
+ // If we are getting a
diff erent index than what was set in the tuple_set
+ // intrinsic. We can just set the input tuple to the one up in the chain.
+ // tuple_get(tuple_set(SetTuple, SetIndex, SetValue), GetIndex)
+ // --> tuple_get(SetTuple, GetIndex)
+ return IC.replaceOperand(II, 0, SetTuple);
+}
+
static Optional<Instruction *> instCombineSVEZip(InstCombiner &IC,
IntrinsicInst &II) {
// zip1(uzp1(A, B), uzp2(A, B)) --> A
@@ -850,6 +876,8 @@ AArch64TTIImpl::instCombineIntrinsic(InstCombiner &IC,
case Intrinsic::aarch64_sve_sunpkhi:
case Intrinsic::aarch64_sve_sunpklo:
return instCombineSVEUnpack(IC, II);
+ case Intrinsic::aarch64_sve_tuple_get:
+ return instCombineSVETupleGet(IC, II);
case Intrinsic::aarch64_sve_zip1:
case Intrinsic::aarch64_sve_zip2:
return instCombineSVEZip(IC, II);
diff --git a/llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-opts-tuple-get.ll b/llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-opts-tuple-get.ll
new file mode 100644
index 0000000000000..de1c6b56c788d
--- /dev/null
+++ b/llvm/test/Transforms/InstCombine/AArch64/sve-intrinsic-opts-tuple-get.ll
@@ -0,0 +1,37 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -S -instcombine < %s | FileCheck %s
+
+target triple = "aarch64-unknown-linux-gnu"
+
+; This stores %a using st4 after reversing the 4 tuples. Check that the
+; redundant sequences of get/set are eliminated.
+define void @redundant_tuple_get_set(<vscale x 64 x i8> %a, i8* %ptr) #0 {
+; CHECK-LABEL: @redundant_tuple_get_set(
+; CHECK-NEXT: [[TMP1:%.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8(<vscale x 64 x i8> [[A:%.*]], i32 3)
+; CHECK-NEXT: [[TMP2:%.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8(<vscale x 64 x i8> [[A]], i32 0)
+; CHECK-NEXT: [[TMP3:%.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8(<vscale x 64 x i8> [[A]], i32 2)
+; CHECK-NEXT: [[TMP4:%.*]] = call <vscale x 16 x i8> @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8(<vscale x 64 x i8> [[A]], i32 1)
+; CHECK-NEXT: call void @llvm.aarch64.sve.st4.nxv16i8(<vscale x 16 x i8> [[TMP1]], <vscale x 16 x i8> [[TMP3]], <vscale x 16 x i8> [[TMP4]], <vscale x 16 x i8> [[TMP2]], <vscale x 16 x i1> shufflevector (<vscale x 16 x i1> insertelement (<vscale x 16 x i1> poison, i1 true, i32 0), <vscale x 16 x i1> poison, <vscale x 16 x i32> zeroinitializer), i8* [[PTR:%.*]])
+; CHECK-NEXT: ret void
+;
+ %1 = call <vscale x 16 x i8> @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8(<vscale x 64 x i8> %a, i32 3)
+ %2 = call <vscale x 16 x i8> @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8(<vscale x 64 x i8> %a, i32 0)
+ %3 = call <vscale x 64 x i8> @llvm.aarch64.sve.tuple.set.nxv64i8.nxv16i8(<vscale x 64 x i8> %a, i32 3, <vscale x 16 x i8> %2)
+ %4 = call <vscale x 64 x i8> @llvm.aarch64.sve.tuple.set.nxv64i8.nxv16i8(<vscale x 64 x i8> %3, i32 0, <vscale x 16 x i8> %1)
+ %5 = call <vscale x 16 x i8> @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8(<vscale x 64 x i8> %4, i32 2)
+ %6 = call <vscale x 16 x i8> @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8(<vscale x 64 x i8> %4, i32 1)
+ %7 = call <vscale x 64 x i8> @llvm.aarch64.sve.tuple.set.nxv64i8.nxv16i8(<vscale x 64 x i8> %4, i32 2, <vscale x 16 x i8> %6)
+ %8 = call <vscale x 64 x i8> @llvm.aarch64.sve.tuple.set.nxv64i8.nxv16i8(<vscale x 64 x i8> %7, i32 1, <vscale x 16 x i8> %5)
+ %9 = call <vscale x 16 x i8> @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8(<vscale x 64 x i8> %8, i32 0)
+ %10 = call <vscale x 16 x i8> @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8(<vscale x 64 x i8> %8, i32 1)
+ %11 = call <vscale x 16 x i8> @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8(<vscale x 64 x i8> %8, i32 2)
+ %12 = call <vscale x 16 x i8> @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8(<vscale x 64 x i8> %8, i32 3)
+ call void @llvm.aarch64.sve.st4.nxv16i8(<vscale x 16 x i8> %9, <vscale x 16 x i8> %10, <vscale x 16 x i8> %11, <vscale x 16 x i8> %12, <vscale x 16 x i1> shufflevector (<vscale x 16 x i1> insertelement (<vscale x 16 x i1> poison, i1 true, i32 0), <vscale x 16 x i1> poison, <vscale x 16 x i32> zeroinitializer), i8* %ptr)
+ ret void
+}
+
+declare <vscale x 64 x i8> @llvm.aarch64.sve.tuple.set.nxv64i8.nxv16i8(<vscale x 64 x i8>, i32, <vscale x 16 x i8>)
+declare <vscale x 16 x i8> @llvm.aarch64.sve.tuple.get.nxv16i8.nxv64i8(<vscale x 64 x i8>, i32)
+declare void @llvm.aarch64.sve.st4.nxv16i8(<vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i8>, <vscale x 16 x i1>, i8*)
+
+attributes #0 = { "target-features"="+sve" }
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