[PATCH] D110238: [LiveIntervals] Fix repairOldRegInRange for simple def cases

[Jay Foad via Phabricator via llvm-commits]

foad created this revision.
Herald added subscribers: kerbowa, pengfei, hiraditya, nhaehnle, jvesely, MatzeB.
foad requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

The fix applied in D23303 <https://reviews.llvm.org/D23303> "LiveIntervalAnalysis: fix a crash in repairOldRegInRange"
was over-zealous. It would bail out when the end of the range to be
repaired was in the middle of the first segment of the live range of
Reg, which was always the case when the range contained a single def of
Reg.

This patch fixes it as suggested by Matthias Braun in post-commit review
on the original patch, and tests it by adding -early-live-intervals to
a selection of existing lit tests that now pass.

(Note that D23303 <https://reviews.llvm.org/D23303> was originally applied to fix a crash in
SILoadStoreOptimizer, but that is now moot since D23814 <https://reviews.llvm.org/D23814> updated
SILoadStoreOptimizer to run before scheduling so it no longer has to
update live intervals.)


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D110238

Files:
  llvm/lib/CodeGen/LiveIntervals.cpp
  llvm/test/CodeGen/AMDGPU/extract-load-i1.ll
  llvm/test/CodeGen/ARM/signext-inreg.ll
  llvm/test/CodeGen/X86/mul-shift-reassoc.ll


Index: llvm/test/CodeGen/X86/mul-shift-reassoc.ll
===================================================================
--- llvm/test/CodeGen/X86/mul-shift-reassoc.ll
+++ llvm/test/CodeGen/X86/mul-shift-reassoc.ll
@@ -1,5 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=i686-- | FileCheck %s
+; RUN: llc < %s -mtriple=i686-- -early-live-intervals | FileCheck %s
 
 define i32 @test(i32 %X, i32 %Y) {
 	; Push the shl through the mul to allow an LEA to be formed, instead
Index: llvm/test/CodeGen/ARM/signext-inreg.ll
===================================================================
--- llvm/test/CodeGen/ARM/signext-inreg.ll
+++ llvm/test/CodeGen/ARM/signext-inreg.ll
@@ -1,5 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc < %s -mtriple=armv8 | FileCheck %s
+; RUN: llc < %s -mtriple=armv8 -early-live-intervals | FileCheck %s
 define <4 x i32> @test(<4 x i32> %m) {
 ; CHECK-LABEL: test:
 ; CHECK:       @ %bb.0: @ %entry
Index: llvm/test/CodeGen/AMDGPU/extract-load-i1.ll
===================================================================
--- llvm/test/CodeGen/AMDGPU/extract-load-i1.ll
+++ llvm/test/CodeGen/AMDGPU/extract-load-i1.ll
@@ -1,5 +1,6 @@
 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -mtriple=amdgcn-amd-amdhsa < %s | FileCheck %s
+; RUN: llc -mtriple=amdgcn-amd-amdhsa -early-live-intervals < %s | FileCheck %s
 
 ; FIXME: Inefficient codegen which skips an optimization of load +
 ; extractelement when the vector element type is not byte-sized.
Index: llvm/lib/CodeGen/LiveIntervals.cpp
===================================================================
--- llvm/lib/CodeGen/LiveIntervals.cpp
+++ llvm/lib/CodeGen/LiveIntervals.cpp
@@ -1571,15 +1571,14 @@
                                         LaneBitmask LaneMask) {
   LiveInterval::iterator LII = LR.find(EndIdx);
   SlotIndex lastUseIdx;
-  if (LII == LR.begin()) {
-    // This happens when the function is called for a subregister that only
-    // occurs _after_ the range that is to be repaired.
-    return;
-  }
-  if (LII != LR.end() && LII->start < EndIdx)
+  if (LII != LR.end() && LII->start < EndIdx) {
     lastUseIdx = LII->end;
-  else
+  } else if (LII == LR.begin()) {
+    // We may not have a liverange at all if this is a subregister untouched
+    // between \p Begin and \p End.
+  } else {
     --LII;
+  }
 
   for (MachineBasicBlock::iterator I = End; I != Begin;) {
     --I;


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D110238.374196.patch
Type: text/x-patch
Size: 2541 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20210922/089fd9b4/attachment.bin>