[PATCH] D110237: [AArch64][SVE] Add DAG combines to improve SVE fixed type FP_EXTEND lowering

[Bradley Smith via Phabricator via llvm-commits]

bsmith created this revision.
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Currently in some cases FP_EXTEND lowering for SVE fixed types can
introduce EXTRACT_SUBVECTOR nodes between purely fixed types. Lowering
these is less than ideal as it may involve going through memory.

Instead, we can push an extra extend into a load feeding the FP_EXTEND,
so as to ensure the load gets split into the same number of components
as the FP_EXTEND. The extra truncate required to do this can then be
combined with an extend that is introduced during FP_EXTEND lowering.

The net result of this is that the extends produced by the FP_EXTEND
lowering are folded into an extending load, and requirement for
EXTRACT_SUBVECTOR nodes is removed.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D110237

Files:
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/test/CodeGen/AArch64/sve-fixed-length-fp-extend-trunc.ll

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