[PATCH] D109889: AMDGPU: Lower one copy from SCC early for SelectionDAG

[Ruiling, Song via Phabricator via llvm-commits]

ruiling added a comment.

>> Using -1 is also misleading, since a true boolean value is also anded with exec

It depends on what do you think of the problem.
We can formalize the boolean values stored in SGPR like this: for uniform booleans, the bits corresponding to active lanes holding the effective value, other bits are undefined. for divergent booleans, the active lanes holding the effective value, other bits are zero.

> Overall I think we should not have contexts where copy from SCC is being used as a broadcast to a vector boolean. I think these only arise as a side effect of the hacky way SIFixSGPRCopies rewrites the function instruction at a time

I would like to keep using -1 for SelectionDAG, the reason is that this is good for generating efficient machine code when there are logical operation with uniform booleans and divergent booleans.
In this way, we are free to just use an S_AND/OR/XOR_B64 to implement logical operations between uniform booleans and divergent booleans. But using 0/1 representation currently in GlobalISel, we need more instructions to achieve a logical operation between uniform booleans and divergent booleans.


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  https://reviews.llvm.org/D109889/new/

https://reviews.llvm.org/D109889