[llvm] a502294 - [AArch64] Regenerate test lines in and-mask-removal.ll
David Green via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 21 07:37:05 PDT 2021
Author: David Green
Date: 2021-09-21T15:37:00+01:00
New Revision: a502294b2d9594e06be01fab344e937ddae22cd1
URL: https://github.com/llvm/llvm-project/commit/a502294b2d9594e06be01fab344e937ddae22cd1
DIFF: https://github.com/llvm/llvm-project/commit/a502294b2d9594e06be01fab344e937ddae22cd1.diff
LOG: [AArch64] Regenerate test lines in and-mask-removal.ll
Added:
Modified:
llvm/test/CodeGen/AArch64/and-mask-removal.ll
Removed:
################################################################################
diff --git a/llvm/test/CodeGen/AArch64/and-mask-removal.ll b/llvm/test/CodeGen/AArch64/and-mask-removal.ll
index 4424b0e41124..665ba38055d4 100644
--- a/llvm/test/CodeGen/AArch64/and-mask-removal.ll
+++ b/llvm/test/CodeGen/AArch64/and-mask-removal.ll
@@ -1,4 +1,5 @@
-; RUN: llc -mtriple=arm64-apple-darwin < %s | FileCheck %s
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -mtriple=aarch64-apple-darwin -aarch64-enable-collect-loh=false < %s | FileCheck %s
@board = common global [400 x i8] zeroinitializer, align 1
@next_string = common global i32 0, align 4
@@ -6,6 +7,25 @@
; Function Attrs: nounwind ssp
define void @new_position(i32 %pos) {
+; CHECK-LABEL: new_position:
+; CHECK: ; %bb.0: ; %entry
+; CHECK-NEXT: adrp x9, _board at GOTPAGE
+; CHECK-NEXT: ldr x9, [x9, _board at GOTPAGEOFF]
+; CHECK-NEXT: ; kill: def $w0 killed $w0 def $x0
+; CHECK-NEXT: sxtw x8, w0
+; CHECK-NEXT: ldrb w9, [x9, x8]
+; CHECK-NEXT: sub w9, w9, #1
+; CHECK-NEXT: cmp w9, #1
+; CHECK-NEXT: b.hi LBB0_2
+; CHECK-NEXT: ; %bb.1: ; %if.then
+; CHECK-NEXT: adrp x9, _next_string at GOTPAGE
+; CHECK-NEXT: ldr x9, [x9, _next_string at GOTPAGEOFF]
+; CHECK-NEXT: adrp x10, _string_number at GOTPAGE
+; CHECK-NEXT: ldr w9, [x9]
+; CHECK-NEXT: ldr x10, [x10, _string_number at GOTPAGEOFF]
+; CHECK-NEXT: str w9, [x10, x8, lsl #2]
+; CHECK-NEXT: LBB0_2: ; %if.end
+; CHECK-NEXT: ret
entry:
%idxprom = sext i32 %pos to i64
%arrayidx = getelementptr inbounds [400 x i8], [400 x i8]* @board, i64 0, i64 %idxprom
@@ -22,12 +42,16 @@ if.then: ; preds = %entry
if.end: ; preds = %if.then, %entry
ret void
-; CHECK-LABEL: new_position
-; CHECK-NOT: and
-; CHECK: ret
}
define zeroext i1 @test8_0(i8 zeroext %x) align 2 {
+; CHECK-LABEL: test8_0:
+; CHECK: ; %bb.0: ; %entry
+; CHECK-NEXT: add w8, w0, #74
+; CHECK-NEXT: and w8, w8, #0xff
+; CHECK-NEXT: cmp w8, #236
+; CHECK-NEXT: cset w0, lo
+; CHECK-NEXT: ret
entry:
%0 = add i8 %x, 74
%1 = icmp ult i8 %0, -20
@@ -36,12 +60,15 @@ ret_false:
ret i1 false
ret_true:
ret i1 true
-; CHECK-LABEL: test8_0
-; CHECK: and
-; CHECK: ret
}
define zeroext i1 @test8_1(i8 zeroext %x) align 2 {
+; CHECK-LABEL: test8_1:
+; CHECK: ; %bb.0: ; %entry
+; CHECK-NEXT: sub w8, w0, #10
+; CHECK-NEXT: cmp w8, #89
+; CHECK-NEXT: cset w0, hi
+; CHECK-NEXT: ret
entry:
%0 = add i8 %x, 246
%1 = icmp uge i8 %0, 90
@@ -50,12 +77,14 @@ ret_false:
ret i1 false
ret_true:
ret i1 true
-; CHECK-LABEL: test8_1
-; CHECK-NOT: and
-; CHECK: ret
}
define zeroext i1 @test8_2(i8 zeroext %x) align 2 {
+; CHECK-LABEL: test8_2:
+; CHECK: ; %bb.0: ; %entry
+; CHECK-NEXT: cmp w0, #208
+; CHECK-NEXT: cset w0, ne
+; CHECK-NEXT: ret
entry:
%0 = add i8 %x, 227
%1 = icmp ne i8 %0, 179
@@ -64,12 +93,14 @@ ret_false:
ret i1 false
ret_true:
ret i1 true
-; CHECK-LABEL: test8_2
-; CHECK-NOT: and
-; CHECK: ret
}
define zeroext i1 @test8_3(i8 zeroext %x) align 2 {
+; CHECK-LABEL: test8_3:
+; CHECK: ; %bb.0: ; %entry
+; CHECK-NEXT: cmp w0, #209
+; CHECK-NEXT: cset w0, eq
+; CHECK-NEXT: ret
entry:
%0 = add i8 %x, 201
%1 = icmp eq i8 %0, 154
@@ -78,12 +109,14 @@ ret_false:
ret i1 false
ret_true:
ret i1 true
-; CHECK-LABEL: test8_3
-; CHECK-NOT: and
-; CHECK: ret
}
define zeroext i1 @test8_4(i8 zeroext %x) align 2 {
+; CHECK-LABEL: test8_4:
+; CHECK: ; %bb.0: ; %entry
+; CHECK-NEXT: cmp w0, #39
+; CHECK-NEXT: cset w0, ne
+; CHECK-NEXT: ret
entry:
%0 = add i8 %x, -79
%1 = icmp ne i8 %0, -40
@@ -92,12 +125,16 @@ ret_false:
ret i1 false
ret_true:
ret i1 true
-; CHECK-LABEL: test8_4
-; CHECK-NOT: and
-; CHECK: ret
}
define zeroext i1 @test8_5(i8 zeroext %x) align 2 {
+; CHECK-LABEL: test8_5:
+; CHECK: ; %bb.0: ; %entry
+; CHECK-NEXT: sub w8, w0, #123
+; CHECK-NEXT: and w8, w8, #0xff
+; CHECK-NEXT: cmp w8, #150
+; CHECK-NEXT: cset w0, hi
+; CHECK-NEXT: ret
entry:
%0 = add i8 %x, 133
%1 = icmp uge i8 %0, -105
@@ -106,12 +143,16 @@ ret_false:
ret i1 false
ret_true:
ret i1 true
-; CHECK-LABEL: test8_5
-; CHECK: and
-; CHECK: ret
}
define zeroext i1 @test8_6(i8 zeroext %x) align 2 {
+; CHECK-LABEL: test8_6:
+; CHECK: ; %bb.0: ; %entry
+; CHECK-NEXT: sub w8, w0, #58
+; CHECK-NEXT: and w8, w8, #0xff
+; CHECK-NEXT: cmp w8, #154
+; CHECK-NEXT: cset w0, hi
+; CHECK-NEXT: ret
entry:
%0 = add i8 %x, -58
%1 = icmp uge i8 %0, 155
@@ -120,12 +161,15 @@ ret_false:
ret i1 false
ret_true:
ret i1 true
-; CHECK-LABEL: test8_6
-; CHECK: and
-; CHECK: ret
}
define zeroext i1 @test8_7(i8 zeroext %x) align 2 {
+; CHECK-LABEL: test8_7:
+; CHECK: ; %bb.0: ; %entry
+; CHECK-NEXT: sub w8, w0, #31
+; CHECK-NEXT: cmp w8, #124
+; CHECK-NEXT: cset w0, lo
+; CHECK-NEXT: ret
entry:
%0 = add i8 %x, 225
%1 = icmp ult i8 %0, 124
@@ -134,14 +178,16 @@ ret_false:
ret i1 false
ret_true:
ret i1 true
-; CHECK-LABEL: test8_7
-; CHECK-NOT: and
-; CHECK: ret
}
define zeroext i1 @test8_8(i8 zeroext %x) align 2 {
+; CHECK-LABEL: test8_8:
+; CHECK: ; %bb.0: ; %entry
+; CHECK-NEXT: cmp w0, #66
+; CHECK-NEXT: cset w0, ne
+; CHECK-NEXT: ret
entry:
%0 = add i8 %x, 190
%1 = icmp uge i8 %0, 1
@@ -150,12 +196,15 @@ ret_false:
ret i1 false
ret_true:
ret i1 true
-; CHECK-LABEL: test8_8
-; CHECK-NOT: and
-; CHECK: ret
}
define zeroext i1 @test16_0(i16 zeroext %x) align 2 {
+; CHECK-LABEL: test16_0:
+; CHECK: ; %bb.0: ; %entry
+; CHECK-NEXT: mov w8, #5086
+; CHECK-NEXT: cmp w0, w8
+; CHECK-NEXT: cset w0, ne
+; CHECK-NEXT: ret
entry:
%0 = add i16 %x, -46989
%1 = icmp ne i16 %0, -41903
@@ -164,12 +213,17 @@ ret_false:
ret i1 false
ret_true:
ret i1 true
-; CHECK-LABEL: test16_0
-; CHECK-NOT: and
-; CHECK: ret
}
define zeroext i1 @test16_2(i16 zeroext %x) align 2 {
+; CHECK-LABEL: test16_2:
+; CHECK: ; %bb.0: ; %entry
+; CHECK-NEXT: mov w8, #16882
+; CHECK-NEXT: add w8, w0, w8
+; CHECK-NEXT: mov w9, #40700
+; CHECK-NEXT: cmp w9, w8, uxth
+; CHECK-NEXT: cset w0, hi
+; CHECK-NEXT: ret
entry:
%0 = add i16 %x, 16882
%1 = icmp ule i16 %0, -24837
@@ -178,14 +232,15 @@ ret_false:
ret i1 false
ret_true:
ret i1 true
-; CHECK-LABEL: test16_2
-; CHECK: mov [[CST:w[0-9]+]], #16882
-; CHECK: add [[ADD:w[0-9]+]], w0, [[CST]]
-; CHECK: cmp {{.*}}, [[ADD]], uxth
-; CHECK: ret
}
define zeroext i1 @test16_3(i16 zeroext %x) align 2 {
+; CHECK-LABEL: test16_3:
+; CHECK: ; %bb.0: ; %entry
+; CHECK-NEXT: mov w8, #53200
+; CHECK-NEXT: cmp w0, w8
+; CHECK-NEXT: cset w0, ne
+; CHECK-NEXT: ret
entry:
%0 = add i16 %x, 29283
%1 = icmp ne i16 %0, 16947
@@ -194,12 +249,17 @@ ret_false:
ret i1 false
ret_true:
ret i1 true
-; CHECK-LABEL: test16_3
-; CHECK-NOT: and
-; CHECK: ret
}
define zeroext i1 @test16_4(i16 zeroext %x) align 2 {
+; CHECK-LABEL: test16_4:
+; CHECK: ; %bb.0: ; %entry
+; CHECK-NEXT: mov w8, #29985
+; CHECK-NEXT: add w8, w0, w8
+; CHECK-NEXT: mov w9, #15676
+; CHECK-NEXT: cmp w9, w8, uxth
+; CHECK-NEXT: cset w0, lo
+; CHECK-NEXT: ret
entry:
%0 = add i16 %x, -35551
%1 = icmp uge i16 %0, 15677
@@ -208,14 +268,15 @@ ret_false:
ret i1 false
ret_true:
ret i1 true
-; CHECK-LABEL: test16_4
-; CHECK: mov [[CST:w[0-9]+]], #29985
-; CHECK: add [[ADD:w[0-9]+]], w0, [[CST]]
-; CHECK: cmp {{.*}}, [[ADD]], uxth
-; CHECK: ret
}
define zeroext i1 @test16_5(i16 zeroext %x) align 2 {
+; CHECK-LABEL: test16_5:
+; CHECK: ; %bb.0: ; %entry
+; CHECK-NEXT: mov w8, #23282
+; CHECK-NEXT: cmp w0, w8
+; CHECK-NEXT: cset w0, ne
+; CHECK-NEXT: ret
entry:
%0 = add i16 %x, -25214
%1 = icmp ne i16 %0, -1932
@@ -224,12 +285,17 @@ ret_false:
ret i1 false
ret_true:
ret i1 true
-; CHECK-LABEL: test16_5
-; CHECK-NOT: and
-; CHECK: ret
}
define zeroext i1 @test16_6(i16 zeroext %x) align 2 {
+; CHECK-LABEL: test16_6:
+; CHECK: ; %bb.0: ; %entry
+; CHECK-NEXT: mov w8, #-32194
+; CHECK-NEXT: add w8, w0, w8
+; CHECK-NEXT: mov w9, #24320
+; CHECK-NEXT: cmp w9, w8, uxth
+; CHECK-NEXT: cset w0, lo
+; CHECK-NEXT: ret
entry:
%0 = add i16 %x, -32194
%1 = icmp uge i16 %0, -41215
@@ -238,12 +304,17 @@ ret_false:
ret i1 false
ret_true:
ret i1 true
-; CHECK-LABEL: test16_6
-; CHECK-NOT: and
-; CHECK: ret
}
define zeroext i1 @test16_7(i16 zeroext %x) align 2 {
+; CHECK-LABEL: test16_7:
+; CHECK: ; %bb.0: ; %entry
+; CHECK-NEXT: mov w8, #9272
+; CHECK-NEXT: add w8, w0, w8
+; CHECK-NEXT: mov w9, #22619
+; CHECK-NEXT: cmp w9, w8, uxth
+; CHECK-NEXT: cset w0, lo
+; CHECK-NEXT: ret
entry:
%0 = add i16 %x, 9272
%1 = icmp uge i16 %0, -42916
@@ -252,14 +323,15 @@ ret_false:
ret i1 false
ret_true:
ret i1 true
-; CHECK-LABEL: test16_7
-; CHECK: mov [[CST:w[0-9]+]], #9272
-; CHECK: add [[ADD:w[0-9]+]], w0, [[CST]]
-; CHECK: cmp {{.*}}, [[ADD]], uxth
-; CHECK: ret
}
define zeroext i1 @test16_8(i16 zeroext %x) align 2 {
+; CHECK-LABEL: test16_8:
+; CHECK: ; %bb.0: ; %entry
+; CHECK-NEXT: mov w8, #4919
+; CHECK-NEXT: cmp w0, w8
+; CHECK-NEXT: cset w0, ne
+; CHECK-NEXT: ret
entry:
%0 = add i16 %x, -63749
%1 = icmp ne i16 %0, 6706
@@ -268,8 +340,5 @@ ret_false:
ret i1 false
ret_true:
ret i1 true
-; CHECK-LABEL: test16_8
-; CHECK-NOT: and
-; CHECK: ret
}
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