[PATCH] D109301: [AMDGPU] Enable copy between VGPR and AGPR classes during regalloc
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 20 16:30:32 PDT 2021
arsenm added inline comments.
================
Comment at: llvm/test/CodeGen/AMDGPU/spill-agpr.mir:34
; GFX908-EXPANDED: $vgpr0 = V_ACCVGPR_READ_B32_e64 killed $agpr0, implicit $exec
+ ; GFX908-EXPANDED: BUFFER_STORE_DWORD_OFFSET killed $vgpr0, $sgpr0_sgpr1_sgpr2_sgpr3, $sgpr32, 4, 0, 0, 0, implicit $exec :: (store (s32) into %stack.1, addrspace 5)
; GFX908-EXPANDED: S_NOP 0, implicit-def renamable $agpr0
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rampitec wrote:
> Another obvious regression.
This is a regression, but I think it's an acceptable one. This is using regalloc fast, so you get no optimizations. You're only losing the optimization to copy between AGPR/VGPR at -O0. The intent of the test is to stress the low level spill handling, which this still accomplishes
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D109301/new/
https://reviews.llvm.org/D109301
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