[llvm] 4ceea77 - [X86] Rename the X86WinAllocaExpander pass and related symbols to "DynAlloca". NFC.
Amara Emerson via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 20 16:19:34 PDT 2021
Author: Amara Emerson
Date: 2021-09-20T16:19:28-07:00
New Revision: 4ceea7740990f5b755a7bb911e92254dd5680921
URL: https://github.com/llvm/llvm-project/commit/4ceea7740990f5b755a7bb911e92254dd5680921
DIFF: https://github.com/llvm/llvm-project/commit/4ceea7740990f5b755a7bb911e92254dd5680921.diff
LOG: [X86] Rename the X86WinAllocaExpander pass and related symbols to "DynAlloca". NFC.
For x86 Darwin, we have a stack checking feature which re-uses some of this
machinery around stack probing on Windows. Renaming this to be more appropriate
for a generic feature.
Differential Revision: https://reviews.llvm.org/D109993
Added:
llvm/lib/Target/X86/X86DynAllocaExpander.cpp
Modified:
llvm/lib/Target/X86/CMakeLists.txt
llvm/lib/Target/X86/X86.h
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/lib/Target/X86/X86ISelLowering.h
llvm/lib/Target/X86/X86InstrCompiler.td
llvm/lib/Target/X86/X86InstrInfo.td
llvm/lib/Target/X86/X86MachineFunctionInfo.h
llvm/lib/Target/X86/X86TargetMachine.cpp
llvm/test/CodeGen/X86/O0-pipeline.ll
llvm/test/CodeGen/X86/opt-pipeline.ll
llvm/utils/gn/secondary/llvm/lib/Target/X86/BUILD.gn
Removed:
llvm/lib/Target/X86/X86WinAllocaExpander.cpp
################################################################################
diff --git a/llvm/lib/Target/X86/CMakeLists.txt b/llvm/lib/Target/X86/CMakeLists.txt
index d13c5d250554b..7aca430a246b2 100644
--- a/llvm/lib/Target/X86/CMakeLists.txt
+++ b/llvm/lib/Target/X86/CMakeLists.txt
@@ -44,6 +44,7 @@ set(sources
X86FixupBWInsts.cpp
X86FixupLEAs.cpp
X86AvoidStoreForwardingBlocks.cpp
+ X86DynAllocaExpander.cpp
X86FixupSetCC.cpp
X86FlagsCopyLowering.cpp
X86FloatingPoint.cpp
@@ -80,7 +81,6 @@ set(sources
X86TargetObjectFile.cpp
X86TargetTransformInfo.cpp
X86VZeroUpper.cpp
- X86WinAllocaExpander.cpp
X86WinEHState.cpp
X86InsertWait.cpp
)
diff --git a/llvm/lib/Target/X86/X86.h b/llvm/lib/Target/X86/X86.h
index eba5b6ce78361..10e1c5d6ed38e 100644
--- a/llvm/lib/Target/X86/X86.h
+++ b/llvm/lib/Target/X86/X86.h
@@ -73,8 +73,8 @@ FunctionPass *createX86AvoidStoreForwardingBlocks();
/// Return a pass that lowers EFLAGS copy pseudo instructions.
FunctionPass *createX86FlagsCopyLoweringPass();
-/// Return a pass that expands WinAlloca pseudo-instructions.
-FunctionPass *createX86WinAllocaExpander();
+/// Return a pass that expands DynAlloca pseudo-instructions.
+FunctionPass *createX86DynAllocaExpander();
/// Return a pass that config the tile registers.
FunctionPass *createX86TileConfigPass();
diff --git a/llvm/lib/Target/X86/X86WinAllocaExpander.cpp b/llvm/lib/Target/X86/X86DynAllocaExpander.cpp
similarity index 83%
rename from llvm/lib/Target/X86/X86WinAllocaExpander.cpp
rename to llvm/lib/Target/X86/X86DynAllocaExpander.cpp
index 9ada0a8dd412f..df8df1e3a65d7 100644
--- a/llvm/lib/Target/X86/X86WinAllocaExpander.cpp
+++ b/llvm/lib/Target/X86/X86DynAllocaExpander.cpp
@@ -1,4 +1,4 @@
-//===----- X86WinAllocaExpander.cpp - Expand WinAlloca pseudo instruction -===//
+//===----- X86DynAllocaExpander.cpp - Expand DynAlloca pseudo instruction -===//
//
// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
// See https://llvm.org/LICENSE.txt for license information.
@@ -6,7 +6,7 @@
//
//===----------------------------------------------------------------------===//
//
-// This file defines a pass that expands WinAlloca pseudo-instructions.
+// This file defines a pass that expands DynAlloca pseudo-instructions.
//
// It performs a conservative analysis to determine whether each allocation
// falls within a region of the stack that is safe to use, or whether stack
@@ -33,26 +33,26 @@ using namespace llvm;
namespace {
-class X86WinAllocaExpander : public MachineFunctionPass {
+class X86DynAllocaExpander : public MachineFunctionPass {
public:
- X86WinAllocaExpander() : MachineFunctionPass(ID) {}
+ X86DynAllocaExpander() : MachineFunctionPass(ID) {}
bool runOnMachineFunction(MachineFunction &MF) override;
private:
- /// Strategies for lowering a WinAlloca.
+ /// Strategies for lowering a DynAlloca.
enum Lowering { TouchAndSub, Sub, Probe };
- /// Deterministic-order map from WinAlloca instruction to desired lowering.
+ /// Deterministic-order map from DynAlloca instruction to desired lowering.
typedef MapVector<MachineInstr*, Lowering> LoweringMap;
- /// Compute which lowering to use for each WinAlloca instruction.
+ /// Compute which lowering to use for each DynAlloca instruction.
void computeLowerings(MachineFunction &MF, LoweringMap& Lowerings);
/// Get the appropriate lowering based on current offset and amount.
Lowering getLowering(int64_t CurrentOffset, int64_t AllocaAmount);
- /// Lower a WinAlloca instruction.
+ /// Lower a DynAlloca instruction.
void lower(MachineInstr* MI, Lowering L);
MachineRegisterInfo *MRI = nullptr;
@@ -64,22 +64,22 @@ class X86WinAllocaExpander : public MachineFunctionPass {
int64_t StackProbeSize = 0;
bool NoStackArgProbe = false;
- StringRef getPassName() const override { return "X86 WinAlloca Expander"; }
+ StringRef getPassName() const override { return "X86 DynAlloca Expander"; }
static char ID;
};
-char X86WinAllocaExpander::ID = 0;
+char X86DynAllocaExpander::ID = 0;
} // end anonymous namespace
-FunctionPass *llvm::createX86WinAllocaExpander() {
- return new X86WinAllocaExpander();
+FunctionPass *llvm::createX86DynAllocaExpander() {
+ return new X86DynAllocaExpander();
}
-/// Return the allocation amount for a WinAlloca instruction, or -1 if unknown.
-static int64_t getWinAllocaAmount(MachineInstr *MI, MachineRegisterInfo *MRI) {
- assert(MI->getOpcode() == X86::WIN_ALLOCA_32 ||
- MI->getOpcode() == X86::WIN_ALLOCA_64);
+/// Return the allocation amount for a DynAlloca instruction, or -1 if unknown.
+static int64_t getDynAllocaAmount(MachineInstr *MI, MachineRegisterInfo *MRI) {
+ assert(MI->getOpcode() == X86::DYN_ALLOCA_32 ||
+ MI->getOpcode() == X86::DYN_ALLOCA_64);
assert(MI->getOperand(0).isReg());
Register AmountReg = MI->getOperand(0).getReg();
@@ -93,8 +93,8 @@ static int64_t getWinAllocaAmount(MachineInstr *MI, MachineRegisterInfo *MRI) {
return Def->getOperand(1).getImm();
}
-X86WinAllocaExpander::Lowering
-X86WinAllocaExpander::getLowering(int64_t CurrentOffset,
+X86DynAllocaExpander::Lowering
+X86DynAllocaExpander::getLowering(int64_t CurrentOffset,
int64_t AllocaAmount) {
// For a non-constant amount or a large amount, we have to probe.
if (AllocaAmount < 0 || AllocaAmount > StackProbeSize)
@@ -128,11 +128,11 @@ static bool isPushPop(const MachineInstr &MI) {
}
}
-void X86WinAllocaExpander::computeLowerings(MachineFunction &MF,
+void X86DynAllocaExpander::computeLowerings(MachineFunction &MF,
LoweringMap &Lowerings) {
// Do a one-pass reverse post-order walk of the CFG to conservatively estimate
// the offset between the stack pointer and the lowest touched part of the
- // stack, and use that to decide how to lower each WinAlloca instruction.
+ // stack, and use that to decide how to lower each DynAlloca instruction.
// Initialize OutOffset[B], the stack offset at exit from B, to something big.
DenseMap<MachineBasicBlock *, int64_t> OutOffset;
@@ -153,10 +153,10 @@ void X86WinAllocaExpander::computeLowerings(MachineFunction &MF,
if (Offset == -1) Offset = INT32_MAX;
for (MachineInstr &MI : *MBB) {
- if (MI.getOpcode() == X86::WIN_ALLOCA_32 ||
- MI.getOpcode() == X86::WIN_ALLOCA_64) {
- // A WinAlloca moves StackPtr, and potentially touches it.
- int64_t Amount = getWinAllocaAmount(&MI, MRI);
+ if (MI.getOpcode() == X86::DYN_ALLOCA_32 ||
+ MI.getOpcode() == X86::DYN_ALLOCA_64) {
+ // A DynAlloca moves StackPtr, and potentially touches it.
+ int64_t Amount = getDynAllocaAmount(&MI, MRI);
Lowering L = getLowering(Offset, Amount);
Lowerings[&MI] = L;
switch (L) {
@@ -195,12 +195,12 @@ static unsigned getSubOpcode(bool Is64Bit, int64_t Amount) {
return isInt<8>(Amount) ? X86::SUB32ri8 : X86::SUB32ri;
}
-void X86WinAllocaExpander::lower(MachineInstr* MI, Lowering L) {
+void X86DynAllocaExpander::lower(MachineInstr *MI, Lowering L) {
const DebugLoc &DL = MI->getDebugLoc();
MachineBasicBlock *MBB = MI->getParent();
MachineBasicBlock::iterator I = *MI;
- int64_t Amount = getWinAllocaAmount(MI, MRI);
+ int64_t Amount = getDynAllocaAmount(MI, MRI);
if (Amount == 0) {
MI->eraseFromParent();
return;
@@ -209,7 +209,7 @@ void X86WinAllocaExpander::lower(MachineInstr* MI, Lowering L) {
// These two variables
diff er on x32, which is a 64-bit target with a
// 32-bit alloca.
bool Is64Bit = STI->is64Bit();
- bool Is64BitAlloca = MI->getOpcode() == X86::WIN_ALLOCA_64;
+ bool Is64BitAlloca = MI->getOpcode() == X86::DYN_ALLOCA_64;
assert(SlotSize == 4 || SlotSize == 8);
switch (L) {
@@ -271,8 +271,8 @@ void X86WinAllocaExpander::lower(MachineInstr* MI, Lowering L) {
AmountDef->eraseFromParent();
}
-bool X86WinAllocaExpander::runOnMachineFunction(MachineFunction &MF) {
- if (!MF.getInfo<X86MachineFunctionInfo>()->hasWinAlloca())
+bool X86DynAllocaExpander::runOnMachineFunction(MachineFunction &MF) {
+ if (!MF.getInfo<X86MachineFunctionInfo>()->hasDynAlloca())
return false;
MRI = &MF.getRegInfo();
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 3520bbfe19835..4aab3ed300d0f 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -25212,8 +25212,8 @@ X86TargetLowering::LowerDYNAMIC_STACKALLOC(SDValue Op,
DAG.getRegister(Vreg, SPTy));
} else {
SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue);
- Chain = DAG.getNode(X86ISD::WIN_ALLOCA, dl, NodeTys, Chain, Size);
- MF.getInfo<X86MachineFunctionInfo>()->setHasWinAlloca(true);
+ Chain = DAG.getNode(X86ISD::DYN_ALLOCA, dl, NodeTys, Chain, Size);
+ MF.getInfo<X86MachineFunctionInfo>()->setHasDynAlloca(true);
const X86RegisterInfo *RegInfo = Subtarget.getRegisterInfo();
Register SPReg = RegInfo->getStackRegister();
@@ -32343,7 +32343,7 @@ const char *X86TargetLowering::getTargetNodeName(unsigned Opcode) const {
NODE_NAME_CASE(VASTART_SAVE_XMM_REGS)
NODE_NAME_CASE(VAARG_64)
NODE_NAME_CASE(VAARG_X32)
- NODE_NAME_CASE(WIN_ALLOCA)
+ NODE_NAME_CASE(DYN_ALLOCA)
NODE_NAME_CASE(MEMBARRIER)
NODE_NAME_CASE(MFENCE)
NODE_NAME_CASE(SEG_ALLOCA)
diff --git a/llvm/lib/Target/X86/X86ISelLowering.h b/llvm/lib/Target/X86/X86ISelLowering.h
index 2e043b83149e3..c6c16128d366b 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.h
+++ b/llvm/lib/Target/X86/X86ISelLowering.h
@@ -654,8 +654,8 @@ namespace llvm {
// is needed so that this can be expanded with control flow.
VASTART_SAVE_XMM_REGS,
- // Windows's _chkstk call to do stack probing.
- WIN_ALLOCA,
+ // A stack checking function call. On Windows it's _chkstk call.
+ DYN_ALLOCA,
// For allocating variable amounts of stack space when using
// segmented stacks. Check if the current stacklet has enough space, and
diff --git a/llvm/lib/Target/X86/X86InstrCompiler.td b/llvm/lib/Target/X86/X86InstrCompiler.td
index afafe976eff56..bb878660231e5 100644
--- a/llvm/lib/Target/X86/X86InstrCompiler.td
+++ b/llvm/lib/Target/X86/X86InstrCompiler.td
@@ -153,15 +153,15 @@ def STACKALLOC_W_PROBING : I<0, Pseudo, (outs), (ins i64imm:$stacksize),
// (compared to ordinary calls) like stack pointer change.
let Defs = [EAX, ESP, EFLAGS], Uses = [ESP] in
-def WIN_ALLOCA_32 : I<0, Pseudo, (outs), (ins GR32:$size),
+def DYN_ALLOCA_32 : I<0, Pseudo, (outs), (ins GR32:$size),
"# dynamic stack allocation",
- [(X86WinAlloca GR32:$size)]>,
+ [(X86DynAlloca GR32:$size)]>,
Requires<[NotLP64]>;
let Defs = [RAX, RSP, EFLAGS], Uses = [RSP] in
-def WIN_ALLOCA_64 : I<0, Pseudo, (outs), (ins GR64:$size),
+def DYN_ALLOCA_64 : I<0, Pseudo, (outs), (ins GR64:$size),
"# dynamic stack allocation",
- [(X86WinAlloca GR64:$size)]>,
+ [(X86DynAlloca GR64:$size)]>,
Requires<[In64BitMode]>;
} // SchedRW
diff --git a/llvm/lib/Target/X86/X86InstrInfo.td b/llvm/lib/Target/X86/X86InstrInfo.td
index d6c36c448eb6d..64bc3e9490524 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.td
+++ b/llvm/lib/Target/X86/X86InstrInfo.td
@@ -112,7 +112,7 @@ def SDT_X86TLSBASEADDR : SDTypeProfile<0, 1, [SDTCisInt<0>]>;
def SDT_X86TLSCALL : SDTypeProfile<0, 1, [SDTCisInt<0>]>;
-def SDT_X86WIN_ALLOCA : SDTypeProfile<0, 1, [SDTCisVT<0, iPTR>]>;
+def SDT_X86DYN_ALLOCA : SDTypeProfile<0, 1, [SDTCisVT<0, iPTR>]>;
def SDT_X86SEG_ALLOCA : SDTypeProfile<1, 1, [SDTCisVT<0, iPTR>, SDTCisVT<1, iPTR>]>;
@@ -294,7 +294,7 @@ def X86pext : SDNode<"X86ISD::PEXT", SDTIntBinOp>;
def X86mul_imm : SDNode<"X86ISD::MUL_IMM", SDTIntBinOp>;
-def X86WinAlloca : SDNode<"X86ISD::WIN_ALLOCA", SDT_X86WIN_ALLOCA,
+def X86DynAlloca : SDNode<"X86ISD::DYN_ALLOCA", SDT_X86DYN_ALLOCA,
[SDNPHasChain, SDNPOutGlue]>;
def X86SegAlloca : SDNode<"X86ISD::SEG_ALLOCA", SDT_X86SEG_ALLOCA,
diff --git a/llvm/lib/Target/X86/X86MachineFunctionInfo.h b/llvm/lib/Target/X86/X86MachineFunctionInfo.h
index 46d2e2a66fd62..7f3c55f317c76 100644
--- a/llvm/lib/Target/X86/X86MachineFunctionInfo.h
+++ b/llvm/lib/Target/X86/X86MachineFunctionInfo.h
@@ -102,8 +102,8 @@ class X86MachineFunctionInfo : public MachineFunctionInfo {
/// True if this function uses the red zone.
bool UsesRedZone = false;
- /// True if this function has WIN_ALLOCA instructions.
- bool HasWinAlloca = false;
+ /// True if this function has DYN_ALLOCA instructions.
+ bool HasDynAlloca = false;
/// True if this function has any preallocated calls.
bool HasPreallocatedCall = false;
@@ -198,8 +198,8 @@ class X86MachineFunctionInfo : public MachineFunctionInfo {
bool getUsesRedZone() const { return UsesRedZone; }
void setUsesRedZone(bool V) { UsesRedZone = V; }
- bool hasWinAlloca() const { return HasWinAlloca; }
- void setHasWinAlloca(bool v) { HasWinAlloca = v; }
+ bool hasDynAlloca() const { return HasDynAlloca; }
+ void setHasDynAlloca(bool v) { HasDynAlloca = v; }
bool hasPreallocatedCall() const { return HasPreallocatedCall; }
void setHasPreallocatedCall(bool v) { HasPreallocatedCall = v; }
diff --git a/llvm/lib/Target/X86/X86TargetMachine.cpp b/llvm/lib/Target/X86/X86TargetMachine.cpp
index ee8cff3e008b3..48d87409a88d9 100644
--- a/llvm/lib/Target/X86/X86TargetMachine.cpp
+++ b/llvm/lib/Target/X86/X86TargetMachine.cpp
@@ -503,7 +503,7 @@ void X86PassConfig::addPreRegAlloc() {
addPass(createX86SpeculativeLoadHardeningPass());
addPass(createX86FlagsCopyLoweringPass());
- addPass(createX86WinAllocaExpander());
+ addPass(createX86DynAllocaExpander());
if (getOptLevel() != CodeGenOpt::None) {
addPass(createX86PreTileConfigPass());
diff --git a/llvm/test/CodeGen/X86/O0-pipeline.ll b/llvm/test/CodeGen/X86/O0-pipeline.ll
index bf3ae61660757..f7999097d71a4 100644
--- a/llvm/test/CodeGen/X86/O0-pipeline.ll
+++ b/llvm/test/CodeGen/X86/O0-pipeline.ll
@@ -41,7 +41,7 @@
; CHECK-NEXT: X86 speculative load hardening
; CHECK-NEXT: MachineDominator Tree Construction
; CHECK-NEXT: X86 EFLAGS copy lowering
-; CHECK-NEXT: X86 WinAlloca Expander
+; CHECK-NEXT: X86 DynAlloca Expander
; CHECK-NEXT: Eliminate PHI nodes for register allocation
; CHECK-NEXT: Two-Address instruction pass
; CHECK-NEXT: Fast Register Allocator
diff --git a/llvm/test/CodeGen/X86/opt-pipeline.ll b/llvm/test/CodeGen/X86/opt-pipeline.ll
index c809433a2fff8..6f634fd536ab7 100644
--- a/llvm/test/CodeGen/X86/opt-pipeline.ll
+++ b/llvm/test/CodeGen/X86/opt-pipeline.ll
@@ -116,7 +116,7 @@
; CHECK-NEXT: X86 speculative load hardening
; CHECK-NEXT: MachineDominator Tree Construction
; CHECK-NEXT: X86 EFLAGS copy lowering
-; CHECK-NEXT: X86 WinAlloca Expander
+; CHECK-NEXT: X86 DynAlloca Expander
; CHECK-NEXT: MachineDominator Tree Construction
; CHECK-NEXT: Machine Natural Loop Construction
; CHECK-NEXT: Tile Register Pre-configure
diff --git a/llvm/utils/gn/secondary/llvm/lib/Target/X86/BUILD.gn b/llvm/utils/gn/secondary/llvm/lib/Target/X86/BUILD.gn
index 3ac53add9b055..b51faadbbcd07 100644
--- a/llvm/utils/gn/secondary/llvm/lib/Target/X86/BUILD.gn
+++ b/llvm/utils/gn/secondary/llvm/lib/Target/X86/BUILD.gn
@@ -85,6 +85,7 @@ static_library("LLVMX86CodeGen") {
"X86CmovConversion.cpp",
"X86DiscriminateMemOps.cpp",
"X86DomainReassignment.cpp",
+ "X86DynAllocaExpander.cpp",
"X86EvexToVex.cpp",
"X86ExpandPseudo.cpp",
"X86FastISel.cpp",
@@ -133,7 +134,6 @@ static_library("LLVMX86CodeGen") {
"X86TargetTransformInfo.cpp",
"X86TileConfig.cpp",
"X86VZeroUpper.cpp",
- "X86WinAllocaExpander.cpp",
"X86WinEHState.cpp",
]
}
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