[PATCH] D109969: AMDGPU/GlobalISel: Add isel patterns for min3 and max3

[Petar Avramovic via Phabricator via llvm-commits]

Petar.Avramovic updated this revision to Diff 373586.
Petar.Avramovic added a comment.

Remove min3 and max3 combine from sdag path, use isel patterns. I am not sure about this for sdag, generated code looks worse. I could move this to the post-regbankcombiner for global-isel.
Notable test changes:

- ieee = true : quieting(fcanonicalize) of operands that go in min3/max3. This is because min/max legalization happens, originally combine would make min3/max3 before legalizing.
- uniform ctlz/cttz lowering : isel selects uniform min/max thus no min3/max3.  `SI Fix SGPR copies` turns this into v_min/v_max and it looks like a regression.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D109969/new/

https://reviews.llvm.org/D109969

Files:
  llvm/lib/Target/AMDGPU/AMDGPUISelDAGToDAG.cpp
  llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
  llvm/lib/Target/AMDGPU/AMDGPUISelLowering.h
  llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.td
  llvm/lib/Target/AMDGPU/GCNSubtarget.h
  llvm/lib/Target/AMDGPU/SIISelLowering.cpp
  llvm/lib/Target/AMDGPU/SIInstructions.td
  llvm/lib/Target/AMDGPU/VOP3Instructions.td
  llvm/test/CodeGen/AMDGPU/GlobalISel/min3-and-max3.ll
  llvm/test/CodeGen/AMDGPU/ctlz.ll
  llvm/test/CodeGen/AMDGPU/cttz.ll
  llvm/test/CodeGen/AMDGPU/fmax3.ll
  llvm/test/CodeGen/AMDGPU/fmin3.ll
  llvm/test/CodeGen/AMDGPU/known-never-snan.ll
  llvm/test/CodeGen/AMDGPU/max3.ll
  llvm/test/CodeGen/AMDGPU/min3.ll

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