[PATCH] D109963: [AArch64] Split bitmask immediate of bitwise AND operation

[Dave Green via Phabricator via llvm-commits]

dmgreen added a comment.

> I have tried to implement it on ISelDAG level. There are already patterns to fold `and` node. After this transformation on ISelDAGToDAG, I was able to see the patterns failed to match. If we can guarantee the pattern for this transformation is matched after matching other patterns related to `and`, it could be ok to implement it on ISelDAG level.  Maybe, we could add `AddedComplexity` to the pattern for this transformation but I thought the CustomInserter is better than it because it guarantees all pattern matching is done.

Custom Inserters are mostly needed for instructions that expand to multiple basic blocks. As far as I understand, this seems to be different selection from and(X, C), which should fit in fine as an AArch64 tblgen pattern or with Dag2Dag select. But the AArch64 backend can be a bit complex in places. Was there something getting in the way of that? If so do you know what?


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  https://reviews.llvm.org/D109963/new/

https://reviews.llvm.org/D109963