[PATCH] D108916: [RISCV] Optimize (add (shl x, c0), (shl y, c1)) with SH*ADD
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Sat Sep 18 15:31:47 PDT 2021
craig.topper added inline comments.
================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:5784
+ // Check c0 and c1.
+ auto *NC0 = dyn_cast<ConstantSDNode>(N0->getOperand(1));
+ auto *NC1 = dyn_cast<ConstantSDNode>(N1->getOperand(1));
----------------
NC0 -> N0C as I think that's the style DAGCombiner.cpp uses.
================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:5917
+ // (SLLI (SH*ADD x, y), c0), if c1-c0 equals to [1|2|3].
+ SDValue N0 = transformAddShlImm(N, DAG, Subtarget);
+ if (N0)
----------------
Don't N0 for the name here. N0 usually means N->getOperand(0)
Use
```
if (SDValue V = transformAddShlImm(N, DAG, Subtarget))
return V;
```
V is pretty generic and putting it in the if limits the scope.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D108916/new/
https://reviews.llvm.org/D108916
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