[llvm] 80110aa - [Tests] Fix incorrect noalias metadata
Nikita Popov via llvm-commits
llvm-commits at lists.llvm.org
Sat Sep 18 11:54:31 PDT 2021
Author: Nikita Popov
Date: 2021-09-18T20:51:00+02:00
New Revision: 80110aafa09aff9869cdb50ed718a169888da578
URL: https://github.com/llvm/llvm-project/commit/80110aafa09aff9869cdb50ed718a169888da578
DIFF: https://github.com/llvm/llvm-project/commit/80110aafa09aff9869cdb50ed718a169888da578.diff
LOG: [Tests] Fix incorrect noalias metadata
Mostly this fixes cases where !noalias or !alias.scope were passed
a scope rather than a scope list. In some cases I opted to drop
the metadata entirely instead, because it is not really relevant
to the test.
Added:
Modified:
llvm/test/Analysis/CostModel/X86/free-intrinsics.ll
llvm/test/Analysis/CostModel/free-intrinsics-datalayout.ll
llvm/test/Analysis/CostModel/free-intrinsics-no_info.ll
llvm/test/CodeGen/AArch64/vector_merge_dep_check.ll
llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.atomic.inc.ll
llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.inc.ll
llvm/test/CodeGen/MIR/X86/memory-operands.mir
llvm/test/Transforms/DeadStoreElimination/merge-stores.ll
llvm/test/Transforms/InferAddressSpaces/AMDGPU/mem-intrinsics.ll
llvm/test/Transforms/InstCombine/AMDGPU/memcpy-from-constant.ll
llvm/test/Transforms/InstCombine/bitcast-store.ll
llvm/test/Transforms/InstCombine/loadstore-metadata.ll
llvm/test/Transforms/LoopVectorize/pr25281.ll
llvm/test/Transforms/LowerMatrixIntrinsics/remarks-shared-subtrees.ll
llvm/test/Transforms/RewriteStatepointsForGC/drop-invalid-metadata.ll
Removed:
################################################################################
diff --git a/llvm/test/Analysis/CostModel/X86/free-intrinsics.ll b/llvm/test/Analysis/CostModel/X86/free-intrinsics.ll
index 9870d9ae6229b..1ed854c84e6c1 100644
--- a/llvm/test/Analysis/CostModel/X86/free-intrinsics.ll
+++ b/llvm/test/Analysis/CostModel/X86/free-intrinsics.ll
@@ -80,6 +80,6 @@ declare void @llvm.var.annotation(i8*, i8*, i8*, i32, i8*)
!1 = distinct !DISubprogram(name: "dummy", line: 79, isLocal: true, isDefinition: true, virtualIndex: 6, flags: DIFlagPrototyped, isOptimized: true)
!2 = !DILabel(scope: !1, name: "label", file: !3, line: 7)
!3 = !DIFile(filename: "debug-label.c", directory: "./")
-!4 = !{ !4 }
+!4 = !{ !5 }
!5 = distinct !{ !5, !6, !"foo: var" }
!6 = distinct !{ !6, !"foo" }
diff --git a/llvm/test/Analysis/CostModel/free-intrinsics-datalayout.ll b/llvm/test/Analysis/CostModel/free-intrinsics-datalayout.ll
index b6b884c7c30ac..0883c3503a607 100644
--- a/llvm/test/Analysis/CostModel/free-intrinsics-datalayout.ll
+++ b/llvm/test/Analysis/CostModel/free-intrinsics-datalayout.ll
@@ -82,6 +82,6 @@ declare void @llvm.var.annotation(i8*, i8*, i8*, i32, i8*)
!1 = distinct !DISubprogram(name: "dummy", line: 79, isLocal: true, isDefinition: true, virtualIndex: 6, flags: DIFlagPrototyped, isOptimized: true)
!2 = !DILabel(scope: !1, name: "label", file: !3, line: 7)
!3 = !DIFile(filename: "debug-label.c", directory: "./")
-!4 = !{ !4 }
+!4 = !{ !5 }
!5 = distinct !{ !5, !6, !"foo: var" }
!6 = distinct !{ !6, !"foo" }
diff --git a/llvm/test/Analysis/CostModel/free-intrinsics-no_info.ll b/llvm/test/Analysis/CostModel/free-intrinsics-no_info.ll
index fb5221b93b1a8..af94652f3217c 100644
--- a/llvm/test/Analysis/CostModel/free-intrinsics-no_info.ll
+++ b/llvm/test/Analysis/CostModel/free-intrinsics-no_info.ll
@@ -80,6 +80,6 @@ declare void @llvm.var.annotation(i8*, i8*, i8*, i32, i8*)
!1 = distinct !DISubprogram(name: "dummy", line: 79, isLocal: true, isDefinition: true, virtualIndex: 6, flags: DIFlagPrototyped, isOptimized: true)
!2 = !DILabel(scope: !1, name: "label", file: !3, line: 7)
!3 = !DIFile(filename: "debug-label.c", directory: "./")
-!4 = !{ !4 }
+!4 = !{ !5 }
!5 = distinct !{ !5, !6, !"foo: var" }
!6 = distinct !{ !6, !"foo" }
diff --git a/llvm/test/CodeGen/AArch64/vector_merge_dep_check.ll b/llvm/test/CodeGen/AArch64/vector_merge_dep_check.ll
index a5e4196165d82..dd83a694ceca6 100644
--- a/llvm/test/CodeGen/AArch64/vector_merge_dep_check.ll
+++ b/llvm/test/CodeGen/AArch64/vector_merge_dep_check.ll
@@ -12,13 +12,13 @@ target triple = "aarch64--linux-android"
; Function Attrs: noinline norecurse nounwind ssp uwtable
define void @fn(<2 x i64>* %argA, <2 x i64>* %argB, i64* %a) #0 align 2 {
- %_p_vec_full = load <2 x i64>, <2 x i64>* %argA, align 4, !alias.scope !1, !noalias !3
+ %_p_vec_full = load <2 x i64>, <2 x i64>* %argA, align 4, !alias.scope !9, !noalias !3
%x = extractelement <2 x i64> %_p_vec_full, i32 1
- store i64 %x, i64* %a, align 8, !alias.scope !4, !noalias !9
- %_p_vec_full155 = load <2 x i64>, <2 x i64>* %argB, align 4, !alias.scope !1, !noalias !3
+ store i64 %x, i64* %a, align 8, !alias.scope !3, !noalias !9
+ %_p_vec_full155 = load <2 x i64>, <2 x i64>* %argB, align 4, !alias.scope !9, !noalias !3
%y = extractelement <2 x i64> %_p_vec_full155, i32 0
%scevgep41 = getelementptr i64, i64* %a, i64 -1
- store i64 %y, i64* %scevgep41, align 8, !alias.scope !4, !noalias !9
+ store i64 %y, i64* %scevgep41, align 8, !alias.scope !3, !noalias !9
ret void
}
diff --git a/llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.atomic.inc.ll b/llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.atomic.inc.ll
index df89351335ccc..f77b67daeee38 100644
--- a/llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.atomic.inc.ll
+++ b/llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.atomic.inc.ll
@@ -79,7 +79,9 @@ define amdgpu_kernel void @lds_atomic_inc_ret_i32(i32 addrspace(1)* %out, i32 ad
ret void
}
-!0 = distinct !{!0, !"noalias-scope"}
+!0 = !{!1}
+!1 = distinct !{!1, !2}
+!2 = distinct !{!2}
define amdgpu_kernel void @lds_atomic_inc_ret_i32_offset(i32 addrspace(1)* %out, i32 addrspace(3)* %ptr) #0 {
; CI-LABEL: lds_atomic_inc_ret_i32_offset:
diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.inc.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.inc.ll
index 7904194e90348..e8cbdc314405c 100644
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.inc.ll
+++ b/llvm/test/CodeGen/AMDGPU/llvm.amdgcn.atomic.inc.ll
@@ -27,7 +27,9 @@ define amdgpu_kernel void @lds_atomic_inc_ret_i32(i32 addrspace(1)* %out, i32 ad
ret void
}
-!0 = distinct !{!0, !"noalias-scope"}
+!0 = !{!1}
+!1 = distinct !{!1, !2}
+!2 = distinct !{!2}
; GCN-LABEL: {{^}}lds_atomic_inc_ret_i32_offset:
; CIVI-DAG: s_mov_b32 m0
diff --git a/llvm/test/CodeGen/MIR/X86/memory-operands.mir b/llvm/test/CodeGen/MIR/X86/memory-operands.mir
index dca4f9d693cb8..483764a915e22 100644
--- a/llvm/test/CodeGen/MIR/X86/memory-operands.mir
+++ b/llvm/test/CodeGen/MIR/X86/memory-operands.mir
@@ -158,17 +158,18 @@
attributes #1 = { nounwind uwtable }
- !9 = distinct !{!9, !10, !"some scope"}
- !10 = distinct !{!10, !"some domain"}
+ !9 = !{!10}
+ !10 = distinct !{!10, !11, !"some scope"}
+ !11 = distinct !{!11, !"some domain"}
define zeroext i1 @range_metadata(i8* %x) {
entry:
- %0 = load i8, i8* %x, align 1, !range !11
+ %0 = load i8, i8* %x, align 1, !range !12
%tobool = trunc i8 %0 to i1
ret i1 %tobool
}
- !11 = !{i8 0, i8 2}
+ !12 = !{i8 0, i8 2}
%st = type { i32, i32 }
diff --git a/llvm/test/Transforms/DeadStoreElimination/merge-stores.ll b/llvm/test/Transforms/DeadStoreElimination/merge-stores.ll
index 8cd593bb00e77..11a9269b51485 100644
--- a/llvm/test/Transforms/DeadStoreElimination/merge-stores.ll
+++ b/llvm/test/Transforms/DeadStoreElimination/merge-stores.ll
@@ -164,7 +164,7 @@ define void @foo(%union.U* nocapture %u) {
;
entry:
%i = getelementptr inbounds %union.U, %union.U* %u, i64 0, i32 0
- store i64 0, i64* %i, align 8, !dbg !22, !tbaa !26, !noalias !30, !nontemporal !29
+ store i64 0, i64* %i, align 8, !dbg !22, !tbaa !26, !noalias !32, !nontemporal !29
%s = bitcast %union.U* %u to i16*
store i16 42, i16* %s, align 8
ret void
@@ -231,6 +231,4 @@ define void @PR36129(i32* %P, i32* %Q) {
; Domains and scopes which might alias
!30 = !{!30}
!31 = !{!31, !30}
-
-!32 = !{!32}
-!33 = !{!33, !32}
+!32 = !{!31}
diff --git a/llvm/test/Transforms/InferAddressSpaces/AMDGPU/mem-intrinsics.ll b/llvm/test/Transforms/InferAddressSpaces/AMDGPU/mem-intrinsics.ll
index 620aae064f972..550bf7352e82f 100644
--- a/llvm/test/Transforms/InferAddressSpaces/AMDGPU/mem-intrinsics.ll
+++ b/llvm/test/Transforms/InferAddressSpaces/AMDGPU/mem-intrinsics.ll
@@ -1,18 +1,18 @@
; RUN: opt -S -mtriple=amdgcn-amd-amdhsa -infer-address-spaces %s | FileCheck %s
; CHECK-LABEL: @memset_group_to_flat(
-; CHECK: call void @llvm.memset.p3i8.i64(i8 addrspace(3)* align 4 %group.ptr, i8 4, i64 32, i1 false), !tbaa !0, !alias.scope !3, !noalias !4
+; CHECK: call void @llvm.memset.p3i8.i64(i8 addrspace(3)* align 4 %group.ptr, i8 4, i64 32, i1 false), !tbaa !0, !alias.scope !3, !noalias !6
define amdgpu_kernel void @memset_group_to_flat(i8 addrspace(3)* %group.ptr, i32 %y) #0 {
%cast = addrspacecast i8 addrspace(3)* %group.ptr to i8*
- call void @llvm.memset.p0i8.i64(i8* align 4 %cast, i8 4, i64 32, i1 false), !tbaa !0, !alias.scope !3, !noalias !4
+ call void @llvm.memset.p0i8.i64(i8* align 4 %cast, i8 4, i64 32, i1 false), !tbaa !0, !alias.scope !3, !noalias !6
ret void
}
; CHECK-LABEL: @memset_global_to_flat(
-; CHECK: call void @llvm.memset.p1i8.i64(i8 addrspace(1)* align 4 %global.ptr, i8 4, i64 32, i1 false), !tbaa !0, !alias.scope !3, !noalias !4
+; CHECK: call void @llvm.memset.p1i8.i64(i8 addrspace(1)* align 4 %global.ptr, i8 4, i64 32, i1 false), !tbaa !0, !alias.scope !3, !noalias !6
define amdgpu_kernel void @memset_global_to_flat(i8 addrspace(1)* %global.ptr, i32 %y) #0 {
%cast = addrspacecast i8 addrspace(1)* %global.ptr to i8*
- call void @llvm.memset.p0i8.i64(i8* align 4 %cast, i8 4, i64 32, i1 false), !tbaa !0, !alias.scope !3, !noalias !4
+ call void @llvm.memset.p0i8.i64(i8* align 4 %cast, i8 4, i64 32, i1 false), !tbaa !0, !alias.scope !3, !noalias !6
ret void
}
@@ -33,60 +33,60 @@ define amdgpu_kernel void @memset_global_to_flat_no_md(i8 addrspace(1)* %global.
}
; CHECK-LABEL: @memcpy_flat_to_flat_replace_src_with_group(
-; CHECK: call void @llvm.memcpy.p0i8.p3i8.i64(i8* align 4 %dest, i8 addrspace(3)* align 4 %src.group.ptr, i64 %size, i1 false), !tbaa !0, !alias.scope !3, !noalias !4
+; CHECK: call void @llvm.memcpy.p0i8.p3i8.i64(i8* align 4 %dest, i8 addrspace(3)* align 4 %src.group.ptr, i64 %size, i1 false), !tbaa !0, !alias.scope !3, !noalias !6
define amdgpu_kernel void @memcpy_flat_to_flat_replace_src_with_group(i8* %dest, i8 addrspace(3)* %src.group.ptr, i64 %size) #0 {
%cast.src = addrspacecast i8 addrspace(3)* %src.group.ptr to i8*
- call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %dest, i8* align 4 %cast.src, i64 %size, i1 false), !tbaa !0, !alias.scope !3, !noalias !4
+ call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %dest, i8* align 4 %cast.src, i64 %size, i1 false), !tbaa !0, !alias.scope !3, !noalias !6
ret void
}
; CHECK-LABEL: @memcpy_inline_flat_to_flat_replace_src_with_group(
-; CHECK: call void @llvm.memcpy.inline.p0i8.p3i8.i64(i8* align 4 %dest, i8 addrspace(3)* align 4 %src.group.ptr, i64 42, i1 false), !tbaa !0, !alias.scope !3, !noalias !4
+; CHECK: call void @llvm.memcpy.inline.p0i8.p3i8.i64(i8* align 4 %dest, i8 addrspace(3)* align 4 %src.group.ptr, i64 42, i1 false), !tbaa !0, !alias.scope !3, !noalias !6
define amdgpu_kernel void @memcpy_inline_flat_to_flat_replace_src_with_group(i8* %dest, i8 addrspace(3)* %src.group.ptr) #0 {
%cast.src = addrspacecast i8 addrspace(3)* %src.group.ptr to i8*
- call void @llvm.memcpy.inline.p0i8.p0i8.i64(i8* align 4 %dest, i8* align 4 %cast.src, i64 42, i1 false), !tbaa !0, !alias.scope !3, !noalias !4
+ call void @llvm.memcpy.inline.p0i8.p0i8.i64(i8* align 4 %dest, i8* align 4 %cast.src, i64 42, i1 false), !tbaa !0, !alias.scope !3, !noalias !6
ret void
}
; CHECK-LABEL: @memcpy_flat_to_flat_replace_dest_with_group(
-; CHECK: call void @llvm.memcpy.p3i8.p0i8.i64(i8 addrspace(3)* align 4 %dest.group.ptr, i8* align 4 %src.ptr, i64 %size, i1 false), !tbaa !0, !alias.scope !3, !noalias !4
+; CHECK: call void @llvm.memcpy.p3i8.p0i8.i64(i8 addrspace(3)* align 4 %dest.group.ptr, i8* align 4 %src.ptr, i64 %size, i1 false), !tbaa !0, !alias.scope !3, !noalias !6
define amdgpu_kernel void @memcpy_flat_to_flat_replace_dest_with_group(i8 addrspace(3)* %dest.group.ptr, i8* %src.ptr, i64 %size) #0 {
%cast.dest = addrspacecast i8 addrspace(3)* %dest.group.ptr to i8*
- call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %cast.dest, i8* align 4 %src.ptr, i64 %size, i1 false), !tbaa !0, !alias.scope !3, !noalias !4
+ call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %cast.dest, i8* align 4 %src.ptr, i64 %size, i1 false), !tbaa !0, !alias.scope !3, !noalias !6
ret void
}
; CHECK-LABEL: @memcpy_flat_to_flat_replace_dest_src_with_group(
-; CHECK: call void @llvm.memcpy.p3i8.p3i8.i64(i8 addrspace(3)* align 4 %src.group.ptr, i8 addrspace(3)* align 4 %src.group.ptr, i64 %size, i1 false), !tbaa !0, !alias.scope !3, !noalias !4
+; CHECK: call void @llvm.memcpy.p3i8.p3i8.i64(i8 addrspace(3)* align 4 %src.group.ptr, i8 addrspace(3)* align 4 %src.group.ptr, i64 %size, i1 false), !tbaa !0, !alias.scope !3, !noalias !6
define amdgpu_kernel void @memcpy_flat_to_flat_replace_dest_src_with_group(i8 addrspace(3)* %dest.group.ptr, i8 addrspace(3)* %src.group.ptr, i64 %size) #0 {
%cast.src = addrspacecast i8 addrspace(3)* %src.group.ptr to i8*
%cast.dest = addrspacecast i8 addrspace(3)* %src.group.ptr to i8*
- call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %cast.dest, i8* align 4 %cast.src, i64 %size, i1 false), !tbaa !0, !alias.scope !3, !noalias !4
+ call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %cast.dest, i8* align 4 %cast.src, i64 %size, i1 false), !tbaa !0, !alias.scope !3, !noalias !6
ret void
}
; CHECK-LABEL: @memcpy_flat_to_flat_replace_dest_group_src_global(
-; CHECK: call void @llvm.memcpy.p3i8.p1i8.i64(i8 addrspace(3)* align 4 %dest.group.ptr, i8 addrspace(1)* align 4 %src.global.ptr, i64 %size, i1 false), !tbaa !0, !alias.scope !3, !noalias !4
+; CHECK: call void @llvm.memcpy.p3i8.p1i8.i64(i8 addrspace(3)* align 4 %dest.group.ptr, i8 addrspace(1)* align 4 %src.global.ptr, i64 %size, i1 false), !tbaa !0, !alias.scope !3, !noalias !6
define amdgpu_kernel void @memcpy_flat_to_flat_replace_dest_group_src_global(i8 addrspace(3)* %dest.group.ptr, i8 addrspace(1)* %src.global.ptr, i64 %size) #0 {
%cast.src = addrspacecast i8 addrspace(1)* %src.global.ptr to i8*
%cast.dest = addrspacecast i8 addrspace(3)* %dest.group.ptr to i8*
- call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %cast.dest, i8* align 4 %cast.src, i64 %size, i1 false), !tbaa !0, !alias.scope !3, !noalias !4
+ call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %cast.dest, i8* align 4 %cast.src, i64 %size, i1 false), !tbaa !0, !alias.scope !3, !noalias !6
ret void
}
; CHECK-LABEL: @memcpy_group_to_flat_replace_dest_global(
-; CHECK: call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* align 4 %dest.global.ptr, i8 addrspace(3)* align 4 %src.group.ptr, i32 %size, i1 false), !tbaa !0, !alias.scope !3, !noalias !4
+; CHECK: call void @llvm.memcpy.p1i8.p3i8.i32(i8 addrspace(1)* align 4 %dest.global.ptr, i8 addrspace(3)* align 4 %src.group.ptr, i32 %size, i1 false), !tbaa !0, !alias.scope !3, !noalias !6
define amdgpu_kernel void @memcpy_group_to_flat_replace_dest_global(i8 addrspace(1)* %dest.global.ptr, i8 addrspace(3)* %src.group.ptr, i32 %size) #0 {
%cast.dest = addrspacecast i8 addrspace(1)* %dest.global.ptr to i8*
- call void @llvm.memcpy.p0i8.p3i8.i32(i8* align 4 %cast.dest, i8 addrspace(3)* align 4 %src.group.ptr, i32 %size, i1 false), !tbaa !0, !alias.scope !3, !noalias !4
+ call void @llvm.memcpy.p0i8.p3i8.i32(i8* align 4 %cast.dest, i8 addrspace(3)* align 4 %src.group.ptr, i32 %size, i1 false), !tbaa !0, !alias.scope !3, !noalias !6
ret void
}
; CHECK-LABEL: @memcpy_flat_to_flat_replace_src_with_group_tbaa_struct(
-; CHECK: call void @llvm.memcpy.p0i8.p3i8.i64(i8* align 4 %dest, i8 addrspace(3)* align 4 %src.group.ptr, i64 %size, i1 false), !tbaa.struct !7
+; CHECK: call void @llvm.memcpy.p0i8.p3i8.i64(i8* align 4 %dest, i8 addrspace(3)* align 4 %src.group.ptr, i64 %size, i1 false), !tbaa.struct !8
define amdgpu_kernel void @memcpy_flat_to_flat_replace_src_with_group_tbaa_struct(i8* %dest, i8 addrspace(3)* %src.group.ptr, i64 %size) #0 {
%cast.src = addrspacecast i8 addrspace(3)* %src.group.ptr to i8*
- call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %dest, i8* align 4 %cast.src, i64 %size, i1 false), !tbaa.struct !7
+ call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %dest, i8* align 4 %cast.src, i64 %size, i1 false), !tbaa.struct !8
ret void
}
@@ -110,17 +110,17 @@ define amdgpu_kernel void @multiple_memcpy_flat_to_flat_replace_src_with_group_n
; Check for iterator problems if the pointer has 2 uses in the same call
; CHECK-LABEL: @memcpy_group_flat_to_flat_self(
-; CHECK: call void @llvm.memcpy.p3i8.p3i8.i64(i8 addrspace(3)* align 4 %group.ptr, i8 addrspace(3)* align 4 %group.ptr, i64 32, i1 false), !tbaa !0, !alias.scope !3, !noalias !4
+; CHECK: call void @llvm.memcpy.p3i8.p3i8.i64(i8 addrspace(3)* align 4 %group.ptr, i8 addrspace(3)* align 4 %group.ptr, i64 32, i1 false), !tbaa !0, !alias.scope !3, !noalias !6
define amdgpu_kernel void @memcpy_group_flat_to_flat_self(i8 addrspace(3)* %group.ptr) #0 {
%cast = addrspacecast i8 addrspace(3)* %group.ptr to i8*
- call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %cast, i8* align 4 %cast, i64 32, i1 false), !tbaa !0, !alias.scope !3, !noalias !4
+ call void @llvm.memcpy.p0i8.p0i8.i64(i8* align 4 %cast, i8* align 4 %cast, i64 32, i1 false), !tbaa !0, !alias.scope !3, !noalias !6
ret void
}
; CHECK-LABEL: @memmove_flat_to_flat_replace_src_with_group(
-; CHECK: call void @llvm.memmove.p0i8.p3i8.i64(i8* align 4 %dest, i8 addrspace(3)* align 4 %src.group.ptr, i64 %size, i1 false), !tbaa !0, !alias.scope !3, !noalias !4
+; CHECK: call void @llvm.memmove.p0i8.p3i8.i64(i8* align 4 %dest, i8 addrspace(3)* align 4 %src.group.ptr, i64 %size, i1 false), !tbaa !0, !alias.scope !3, !noalias !6
define amdgpu_kernel void @memmove_flat_to_flat_replace_src_with_group(i8* %dest, i8 addrspace(3)* %src.group.ptr, i64 %size) #0 {
%cast.src = addrspacecast i8 addrspace(3)* %src.group.ptr to i8*
- call void @llvm.memmove.p0i8.p0i8.i64(i8* align 4 %dest, i8* align 4 %cast.src, i64 %size, i1 false), !tbaa !0, !alias.scope !3, !noalias !4
+ call void @llvm.memmove.p0i8.p0i8.i64(i8* align 4 %dest, i8* align 4 %cast.src, i64 %size, i1 false), !tbaa !0, !alias.scope !3, !noalias !6
ret void
}
@@ -136,8 +136,9 @@ attributes #1 = { argmemonly nounwind }
!0 = !{!1, !1, i64 0}
!1 = !{!"A", !2}
!2 = !{!"tbaa root"}
-!3 = !{!"B", !2}
-!4 = !{!5}
-!5 = distinct !{!5, !6, !"some scope"}
-!6 = distinct !{!6, !"some domain"}
-!7 = !{i64 0, i64 8, null}
+!3 = !{!4}
+!4 = distinct !{!4, !5, !"some scope 1"}
+!5 = distinct !{!5, !"some domain"}
+!6 = !{!7}
+!7 = distinct !{!7, !5, !"some scope 2"}
+!8 = !{i64 0, i64 8, null}
diff --git a/llvm/test/Transforms/InstCombine/AMDGPU/memcpy-from-constant.ll b/llvm/test/Transforms/InstCombine/AMDGPU/memcpy-from-constant.ll
index c6028267aae6f..d258e46611753 100644
--- a/llvm/test/Transforms/InstCombine/AMDGPU/memcpy-from-constant.ll
+++ b/llvm/test/Transforms/InstCombine/AMDGPU/memcpy-from-constant.ll
@@ -221,7 +221,7 @@ define amdgpu_kernel void @byref_infloop_metadata(i8* %scratch, %struct.ty addrs
; CHECK-LABEL: @byref_infloop_metadata(
; CHECK-NEXT: bb:
; CHECK-NEXT: [[CAST_ALLOCA:%.*]] = bitcast [[STRUCT_TY:%.*]] addrspace(4)* [[ARG:%.*]] to i8 addrspace(4)*
-; CHECK-NEXT: call void @llvm.memcpy.p0i8.p4i8.i32(i8* noundef nonnull align 4 dereferenceable(16) [[SCRATCH:%.*]], i8 addrspace(4)* noundef align 4 dereferenceable(16) [[CAST_ALLOCA]], i32 16, i1 false), !noalias !1
+; CHECK-NEXT: call void @llvm.memcpy.p0i8.p4i8.i32(i8* noundef nonnull align 4 dereferenceable(16) [[SCRATCH:%.*]], i8 addrspace(4)* noundef align 4 dereferenceable(16) [[CAST_ALLOCA]], i32 16, i1 false), !noalias !0
; CHECK-NEXT: ret void
;
bb:
@@ -229,7 +229,7 @@ bb:
%cast.arg = bitcast %struct.ty addrspace(4)* %arg to i8 addrspace(4)*
%cast.alloca = bitcast [4 x i32] addrspace(5)* %alloca to i8 addrspace(5)*
call void @llvm.memcpy.p5i8.p4i8.i32(i8 addrspace(5)* align 4 %cast.alloca, i8 addrspace(4)* align 4 %cast.arg, i32 16, i1 false), !noalias !0
- call void @llvm.memcpy.p0i8.p5i8.i32(i8* align 4 %scratch, i8 addrspace(5)* align 4 %cast.alloca, i32 16, i1 false), !noalias !1
+ call void @llvm.memcpy.p0i8.p5i8.i32(i8* align 4 %scratch, i8 addrspace(5)* align 4 %cast.alloca, i32 16, i1 false), !noalias !0
ret void
}
@@ -282,5 +282,6 @@ declare i8 addrspace(4)* @llvm.amdgcn.kernarg.segment.ptr() #1
attributes #0 = { argmemonly nounwind willreturn }
attributes #1 = { nounwind readnone speculatable }
-!0 = !{!0}
-!1 = !{!1}
+!0 = !{!1}
+!1 = !{!1, !2}
+!2 = !{!2}
diff --git a/llvm/test/Transforms/InstCombine/bitcast-store.ll b/llvm/test/Transforms/InstCombine/bitcast-store.ll
index 2308d77be32ca..d20aa3e0cf05a 100644
--- a/llvm/test/Transforms/InstCombine/bitcast-store.ll
+++ b/llvm/test/Transforms/InstCombine/bitcast-store.ll
@@ -10,11 +10,11 @@ target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f3
@G = external constant [5 x i8*]
; CHECK-LABEL: @foo
-; CHECK: store i32 %x, i32* %{{.*}}, align 16, !noalias !0, !llvm.access.group !1
+; CHECK: store i32 %x, i32* %{{.*}}, align 16, !noalias !0, !llvm.access.group !3
define void @foo(i32 %x, float* %p) nounwind {
entry:
%x.cast = bitcast i32 %x to float
- store float %x.cast, float* %p, align 16, !noalias !0, !llvm.access.group !1
+ store float %x.cast, float* %p, align 16, !noalias !0, !llvm.access.group !3
ret void
}
@@ -47,5 +47,7 @@ entry:
ret void
}
-!0 = !{!0}
-!1 = !{}
\ No newline at end of file
+!0 = !{!1}
+!1 = !{!1, !2}
+!2 = !{!2}
+!3 = !{}
diff --git a/llvm/test/Transforms/InstCombine/loadstore-metadata.ll b/llvm/test/Transforms/InstCombine/loadstore-metadata.ll
index 42f6900c2ab5e..c8457c0863249 100644
--- a/llvm/test/Transforms/InstCombine/loadstore-metadata.ll
+++ b/llvm/test/Transforms/InstCombine/loadstore-metadata.ll
@@ -8,7 +8,7 @@ define i32 @test_load_cast_combine_tbaa(float* %ptr) {
; CHECK-LABEL: @test_load_cast_combine_tbaa(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = bitcast float* [[PTR:%.*]] to i32*
-; CHECK-NEXT: [[L1:%.*]] = load i32, i32* [[TMP0]], align 4, [[TBAA0:!tbaa !.*]]
+; CHECK-NEXT: [[L1:%.*]] = load i32, i32* [[TMP0]], align 4, !tbaa [[TBAA0:![0-9]+]]
; CHECK-NEXT: ret i32 [[L1]]
;
entry:
@@ -22,11 +22,11 @@ define i32 @test_load_cast_combine_noalias(float* %ptr) {
; CHECK-LABEL: @test_load_cast_combine_noalias(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = bitcast float* [[PTR:%.*]] to i32*
-; CHECK-NEXT: [[L1:%.*]] = load i32, i32* [[TMP0]], align 4, !alias.scope !3, !noalias !4
+; CHECK-NEXT: [[L1:%.*]] = load i32, i32* [[TMP0]], align 4, !alias.scope !3, !noalias !3
; CHECK-NEXT: ret i32 [[L1]]
;
entry:
- %l = load float, float* %ptr, !alias.scope !3, !noalias !4
+ %l = load float, float* %ptr, !alias.scope !3, !noalias !3
%c = bitcast float %l to i32
ret i32 %c
}
@@ -42,7 +42,7 @@ define float @test_load_cast_combine_range(i32* %ptr) {
; CHECK-NEXT: ret float [[L1]]
;
entry:
- %l = load i32, i32* %ptr, !range !5
+ %l = load i32, i32* %ptr, !range !6
%c = bitcast i32 %l to float
ret float %c
}
@@ -52,11 +52,11 @@ define i32 @test_load_cast_combine_invariant(float* %ptr) {
; CHECK-LABEL: @test_load_cast_combine_invariant(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = bitcast float* [[PTR:%.*]] to i32*
-; CHECK-NEXT: [[L1:%.*]] = load i32, i32* [[TMP0]], align 4, !invariant.load !7
+; CHECK-NEXT: [[L1:%.*]] = load i32, i32* [[TMP0]], align 4, !invariant.load !6
; CHECK-NEXT: ret i32 [[L1]]
;
entry:
- %l = load float, float* %ptr, !invariant.load !6
+ %l = load float, float* %ptr, !invariant.load !7
%c = bitcast float %l to i32
ret i32 %c
}
@@ -67,11 +67,11 @@ define i32 @test_load_cast_combine_nontemporal(float* %ptr) {
; CHECK-LABEL: @test_load_cast_combine_nontemporal(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = bitcast float* [[PTR:%.*]] to i32*
-; CHECK-NEXT: [[L1:%.*]] = load i32, i32* [[TMP0]], align 4, !nontemporal !8
+; CHECK-NEXT: [[L1:%.*]] = load i32, i32* [[TMP0]], align 4, !nontemporal !7
; CHECK-NEXT: ret i32 [[L1]]
;
entry:
- %l = load float, float* %ptr, !nontemporal !7
+ %l = load float, float* %ptr, !nontemporal !8
%c = bitcast float %l to i32
ret i32 %c
}
@@ -82,11 +82,11 @@ define i8* @test_load_cast_combine_align(i32** %ptr) {
; CHECK-LABEL: @test_load_cast_combine_align(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32** [[PTR:%.*]] to i8**
-; CHECK-NEXT: [[L1:%.*]] = load i8*, i8** [[TMP0]], align 8, !align !9
+; CHECK-NEXT: [[L1:%.*]] = load i8*, i8** [[TMP0]], align 8, !align !8
; CHECK-NEXT: ret i8* [[L1]]
;
entry:
- %l = load i32*, i32** %ptr, !align !8
+ %l = load i32*, i32** %ptr, !align !9
%c = bitcast i32* %l to i8*
ret i8* %c
}
@@ -97,11 +97,11 @@ define i8* @test_load_cast_combine_deref(i32** %ptr) {
; CHECK-LABEL: @test_load_cast_combine_deref(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32** [[PTR:%.*]] to i8**
-; CHECK-NEXT: [[L1:%.*]] = load i8*, i8** [[TMP0]], align 8, !dereferenceable !9
+; CHECK-NEXT: [[L1:%.*]] = load i8*, i8** [[TMP0]], align 8, !dereferenceable !8
; CHECK-NEXT: ret i8* [[L1]]
;
entry:
- %l = load i32*, i32** %ptr, !dereferenceable !8
+ %l = load i32*, i32** %ptr, !dereferenceable !9
%c = bitcast i32* %l to i8*
ret i8* %c
}
@@ -112,11 +112,11 @@ define i8* @test_load_cast_combine_deref_or_null(i32** %ptr) {
; CHECK-LABEL: @test_load_cast_combine_deref_or_null(
; CHECK-NEXT: entry:
; CHECK-NEXT: [[TMP0:%.*]] = bitcast i32** [[PTR:%.*]] to i8**
-; CHECK-NEXT: [[L1:%.*]] = load i8*, i8** [[TMP0]], align 8, !dereferenceable_or_null !9
+; CHECK-NEXT: [[L1:%.*]] = load i8*, i8** [[TMP0]], align 8, !dereferenceable_or_null !8
; CHECK-NEXT: ret i8* [[L1]]
;
entry:
- %l = load i32*, i32** %ptr, !dereferenceable_or_null !8
+ %l = load i32*, i32** %ptr, !dereferenceable_or_null !9
%c = bitcast i32* %l to i8*
ret i8* %c
}
@@ -134,11 +134,11 @@ define void @test_load_cast_combine_loop(float* %src, i32* %dst, i32 %n) {
; CHECK-NEXT: [[TMP1:%.*]] = sext i32 [[I]] to i64
; CHECK-NEXT: [[DST_GEP:%.*]] = getelementptr inbounds i32, i32* [[DST:%.*]], i64 [[TMP1]]
; CHECK-NEXT: [[TMP2:%.*]] = bitcast float* [[SRC_GEP]] to i32*
-; CHECK-NEXT: [[L1:%.*]] = load i32, i32* [[TMP2]], align 4, !llvm.access.group !6
+; CHECK-NEXT: [[L1:%.*]] = load i32, i32* [[TMP2]], align 4, !llvm.access.group !9
; CHECK-NEXT: store i32 [[L1]], i32* [[DST_GEP]], align 4
; CHECK-NEXT: [[I_NEXT]] = add i32 [[I]], 1
; CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[I_NEXT]], [[N:%.*]]
-; CHECK-NEXT: br i1 [[CMP]], label [[LOOP]], label [[EXIT:%.*]], [[LOOP1:!llvm.loop !.*]]
+; CHECK-NEXT: br i1 [[CMP]], label [[LOOP]], label [[EXIT:%.*]], !llvm.loop [[LOOP1:![0-9]+]]
; CHECK: exit:
; CHECK-NEXT: ret void
;
@@ -149,7 +149,7 @@ loop:
%i = phi i32 [ 0, %entry ], [ %i.next, %loop ]
%src.gep = getelementptr inbounds float, float* %src, i32 %i
%dst.gep = getelementptr inbounds i32, i32* %dst, i32 %i
- %l = load float, float* %src.gep, !llvm.access.group !9
+ %l = load float, float* %src.gep, !llvm.access.group !10
%c = bitcast float %l to i32
store i32 %c, i32* %dst.gep
%i.next = add i32 %i, 1
@@ -163,7 +163,7 @@ exit:
define void @test_load_cast_combine_nonnull(float** %ptr) {
; CHECK-LABEL: @test_load_cast_combine_nonnull(
; CHECK-NEXT: entry:
-; CHECK-NEXT: [[P:%.*]] = load float*, float** [[PTR:%.*]], align 8, !nonnull !7
+; CHECK-NEXT: [[P:%.*]] = load float*, float** [[PTR:%.*]], align 8, !nonnull !10
; CHECK-NEXT: [[GEP:%.*]] = getelementptr float*, float** [[PTR]], i64 42
; CHECK-NEXT: store float* [[P]], float** [[GEP]], align 8
; CHECK-NEXT: ret void
@@ -178,10 +178,11 @@ entry:
!0 = !{!1, !1, i64 0}
!1 = !{!"scalar type", !2}
!2 = !{!"root"}
-!3 = distinct !{!3, !4}
-!4 = distinct !{!4, !{!"llvm.loop.parallel_accesses", !9}}
-!5 = !{i32 0, i32 42}
-!6 = !{}
-!7 = !{i32 1}
-!8 = !{i64 8}
-!9 = distinct !{}
+!3 = !{!4}
+!4 = distinct !{!4, !5}
+!5 = distinct !{!5}
+!6 = !{i32 0, i32 42}
+!7 = !{}
+!8 = !{i32 1}
+!9 = !{i64 8}
+!10 = distinct !{}
diff --git a/llvm/test/Transforms/LoopVectorize/pr25281.ll b/llvm/test/Transforms/LoopVectorize/pr25281.ll
index 8f48ba5d4c22c..21eb25f9a5ee2 100644
--- a/llvm/test/Transforms/LoopVectorize/pr25281.ll
+++ b/llvm/test/Transforms/LoopVectorize/pr25281.ll
@@ -7,13 +7,13 @@ target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
define void @foo(float** noalias nocapture readonly %in, i32* noalias nocapture readonly %isCompressed, float* noalias nocapture readonly %out) {
entry_block:
%tmp = getelementptr float*, float** %in, i32 0
- %in_0 = load float*, float** %tmp, !alias.scope !0
+ %in_0 = load float*, float** %tmp
%tmp1 = getelementptr i32, i32* %isCompressed, i32 0
- %isCompressed_0 = load i32, i32* %tmp1, !alias.scope !1
+ %isCompressed_0 = load i32, i32* %tmp1
%tmp2 = getelementptr float*, float** %in, i32 1
- %in_1 = load float*, float** %tmp2, !alias.scope !2
+ %in_1 = load float*, float** %tmp2
%tmp3 = getelementptr i32, i32* %isCompressed, i32 1
- %isCompressed_1 = load i32, i32* %tmp3, !alias.scope !3
+ %isCompressed_1 = load i32, i32* %tmp3
br label %for_each_frames
for_each_frames:
@@ -29,15 +29,15 @@ for_each_channel:
%tmp6 = mul i32 %frameIndex, %tmp5
%offset0 = add i32 %tmp6, %channelIndex
%tmp7 = getelementptr float, float* %in_0, i32 %offset0
- %in_0_index = load float, float* %tmp7, align 4, !alias.scope !4
+ %in_0_index = load float, float* %tmp7, align 4
%tmp8 = xor i32 %isCompressed_1, 1
%tmp9 = mul i32 %frameIndex, %tmp8
%offset1 = add i32 %tmp9, %channelIndex
%tmp10 = getelementptr float, float* %in_1, i32 %offset1
- %in_1_index = load float, float* %tmp10, align 4, !alias.scope !5
+ %in_1_index = load float, float* %tmp10, align 4
%tmp11 = fadd float %in_0_index, %in_1_index
%tmp12 = getelementptr float, float* %out, i32 %tmp4
- store float %tmp11, float* %tmp12, align 4, !alias.noalias !6
+ store float %tmp11, float* %tmp12, align 4
%tmp13 = icmp eq i32 %nextChannelIndex, 2
br i1 %tmp13, label %for_each_frames_end, label %for_each_channel
@@ -48,11 +48,3 @@ for_each_frames_end:
return:
ret void
}
-
-!0 = distinct !{!0}
-!1 = distinct !{!1, !0}
-!2 = distinct !{!2, !0}
-!3 = distinct !{!3, !0}
-!4 = distinct !{!4, !0}
-!5 = distinct !{!5, !0}
-!6 = !{!2, !3, !4, !5, !1}
diff --git a/llvm/test/Transforms/LowerMatrixIntrinsics/remarks-shared-subtrees.ll b/llvm/test/Transforms/LowerMatrixIntrinsics/remarks-shared-subtrees.ll
index 59e17e31e89d9..042ae3c2f9d34 100644
--- a/llvm/test/Transforms/LowerMatrixIntrinsics/remarks-shared-subtrees.ll
+++ b/llvm/test/Transforms/LowerMatrixIntrinsics/remarks-shared-subtrees.ll
@@ -91,8 +91,8 @@
; STDERR-NEXT: 10)
define void @test_2leafs(double* %arg1, double* %arg2, double* %arg3, i64 %stride) !dbg !8 {
bb:
- %shared.load = tail call <8 x double> @llvm.matrix.column.major.load.v8f64.p0f64(double* %arg1, i64 %stride, i1 false, i32 2, i32 4), !dbg !10, !noalias !10
- %shared.load.2 = tail call <30 x double> @llvm.matrix.column.major.load.v30f64.p0f64(double* %arg3, i64 %stride, i1 false, i32 2, i32 15), !dbg !10, !noalias !10
+ %shared.load = tail call <8 x double> @llvm.matrix.column.major.load.v8f64.p0f64(double* %arg1, i64 %stride, i1 false, i32 2, i32 4), !dbg !10
+ %shared.load.2 = tail call <30 x double> @llvm.matrix.column.major.load.v30f64.p0f64(double* %arg3, i64 %stride, i1 false, i32 2, i32 15), !dbg !10
%tmp17 = tail call <8 x double> @llvm.matrix.transpose.v8f64(<8 x double> %shared.load, i32 2, i32 4), !dbg !10
tail call void @llvm.matrix.column.major.store.v8f64.p0f64(<8 x double> %tmp17, double* %arg3, i64 10, i1 false, i32 4, i32 2), !dbg !10
%tmp18 = tail call <60 x double> @llvm.matrix.column.major.load.v60f64.p0f64(double* %arg2, i64 20, i1 false, i32 4, i32 15), !dbg !11
diff --git a/llvm/test/Transforms/RewriteStatepointsForGC/drop-invalid-metadata.ll b/llvm/test/Transforms/RewriteStatepointsForGC/drop-invalid-metadata.ll
index f6a5e17a3be18..7ba9a5de876c1 100644
--- a/llvm/test/Transforms/RewriteStatepointsForGC/drop-invalid-metadata.ll
+++ b/llvm/test/Transforms/RewriteStatepointsForGC/drop-invalid-metadata.ll
@@ -57,9 +57,9 @@ define void @test_noalias(i32 %x, i32 addrspace(1)* %p, i32 addrspace(1)* %q) gc
; CHECK-NEXT: %p.relocated.casted = bitcast i8 addrspace(1)* %p.relocated to i32 addrspace(1)*
; CHECK-NEXT: store i32 %x, i32 addrspace(1)* %p.relocated.casted, align 16
entry:
- %y = load i32, i32 addrspace(1)* %q, align 16, !noalias !3
+ %y = load i32, i32 addrspace(1)* %q, align 16, !noalias !5
call void @baz(i32 %x)
- store i32 %x, i32 addrspace(1)* %p, align 16, !noalias !4
+ store i32 %x, i32 addrspace(1)* %p, align 16, !noalias !5
ret void
}
@@ -69,7 +69,7 @@ define void @test_dereferenceable(i32 addrspace(1)* addrspace(1)* %p, i32 %x, i3
; CHECK: %v1 = load i32 addrspace(1)*, i32 addrspace(1)* addrspace(1)* %p
; CHECK-NEXT: %v2 = load i32, i32 addrspace(1)* %v1
; CHECK: gc.statepoint
- %v1 = load i32 addrspace(1)*, i32 addrspace(1)* addrspace(1)* %p, !dereferenceable !5
+ %v1 = load i32 addrspace(1)*, i32 addrspace(1)* addrspace(1)* %p, !dereferenceable !6
%v2 = load i32, i32 addrspace(1)* %v1
call void @baz(i32 %x)
store i32 %v2, i32 addrspace(1)* %q, align 16
@@ -137,5 +137,6 @@ attributes #0 = { nounwind readonly }
!1 = !{}
!2 = !{i32 10, i32 1}
!3 = !{!3}
-!4 = !{!4}
-!5 = !{i64 8}
+!4 = !{!4, !3}
+!5 = !{!4}
+!6 = !{i64 8}
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