[llvm] 2b0b1d5 - [SLP][NFC]Add a test for reorder of alt shuffle operands.

Alexey Bataev via llvm-commits llvm-commits at lists.llvm.org
Fri Sep 17 10:43:18 PDT 2021


Author: Alexey Bataev
Date: 2021-09-17T10:42:45-07:00
New Revision: 2b0b1d531974295c0d7c5ebb6f8c78c42d22a260

URL: https://github.com/llvm/llvm-project/commit/2b0b1d531974295c0d7c5ebb6f8c78c42d22a260
DIFF: https://github.com/llvm/llvm-project/commit/2b0b1d531974295c0d7c5ebb6f8c78c42d22a260.diff

LOG: [SLP][NFC]Add a test for reorder of alt shuffle operands.

Added: 
    llvm/test/Transforms/SLPVectorizer/X86/vectorize-reorder-alt-shuffle.ll

Modified: 
    

Removed: 
    


################################################################################
diff  --git a/llvm/test/Transforms/SLPVectorizer/X86/vectorize-reorder-alt-shuffle.ll b/llvm/test/Transforms/SLPVectorizer/X86/vectorize-reorder-alt-shuffle.ll
new file mode 100644
index 0000000000000..0e079c42d7d08
--- /dev/null
+++ b/llvm/test/Transforms/SLPVectorizer/X86/vectorize-reorder-alt-shuffle.ll
@@ -0,0 +1,67 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -slp-vectorizer -S -mtriple=x86_64-unknown-linux-gnu < %s | FileCheck %s
+
+define void @foo(i8* %c, float* %d) {
+; CHECK-LABEL: @foo(
+; CHECK-NEXT:  entry:
+; CHECK-NEXT:    [[ARRAYIDX1:%.*]] = getelementptr inbounds i8, i8* [[C:%.*]], i64 4
+; CHECK-NEXT:    [[ARRAYIDX4:%.*]] = getelementptr inbounds i8, i8* [[C]], i64 1
+; CHECK-NEXT:    [[ARRAYIDX12:%.*]] = getelementptr inbounds i8, i8* [[C]], i64 2
+; CHECK-NEXT:    [[ARRAYIDX17:%.*]] = getelementptr inbounds i8, i8* [[C]], i64 3
+; CHECK-NEXT:    [[TMP0:%.*]] = bitcast i8* [[ARRAYIDX4]] to <4 x i8>*
+; CHECK-NEXT:    [[TMP1:%.*]] = load <4 x i8>, <4 x i8>* [[TMP0]], align 1
+; CHECK-NEXT:    [[SHUFFLE:%.*]] = shufflevector <4 x i8> [[TMP1]], <4 x i8> poison, <4 x i32> <i32 1, i32 2, i32 3, i32 0>
+; CHECK-NEXT:    [[TMP2:%.*]] = zext <4 x i8> [[SHUFFLE]] to <4 x i32>
+; CHECK-NEXT:    [[TMP3:%.*]] = shl nuw nsw <4 x i32> [[TMP2]], <i32 2, i32 2, i32 3, i32 2>
+; CHECK-NEXT:    [[TMP4:%.*]] = and <4 x i32> [[TMP2]], <i32 2, i32 2, i32 3, i32 2>
+; CHECK-NEXT:    [[TMP5:%.*]] = shufflevector <4 x i32> [[TMP3]], <4 x i32> [[TMP4]], <4 x i32> <i32 0, i32 1, i32 6, i32 3>
+; CHECK-NEXT:    [[ADD_PTR:%.*]] = getelementptr inbounds float, float* [[D:%.*]], i64 -1
+; CHECK-NEXT:    [[ADD_PTR37:%.*]] = getelementptr inbounds float, float* [[D]], i64 -2
+; CHECK-NEXT:    [[ADD_PTR45:%.*]] = getelementptr inbounds float, float* [[D]], i64 -3
+; CHECK-NEXT:    [[TMP6:%.*]] = add nsw <4 x i32> poison, [[TMP5]]
+; CHECK-NEXT:    [[TMP7:%.*]] = sitofp <4 x i32> [[TMP6]] to <4 x float>
+; CHECK-NEXT:    [[TMP8:%.*]] = fdiv <4 x float> [[TMP7]], poison
+; CHECK-NEXT:    [[ADD_PTR53:%.*]] = getelementptr inbounds float, float* [[D]], i64 -4
+; CHECK-NEXT:    [[TMP9:%.*]] = bitcast float* [[ADD_PTR53]] to <4 x float>*
+; CHECK-NEXT:    store <4 x float> [[TMP8]], <4 x float>* [[TMP9]], align 4
+; CHECK-NEXT:    ret void
+;
+entry:
+  %arrayidx1 = getelementptr inbounds i8, i8* %c, i64 4
+  %0 = load i8, i8* %arrayidx1, align 1
+  %conv2 = zext i8 %0 to i32
+  %and = and i32 %conv2, 3
+  %arrayidx4 = getelementptr inbounds i8, i8* %c, i64 1
+  %1 = load i8, i8* %arrayidx4, align 1
+  %conv5 = zext i8 %1 to i32
+  %shl6 = shl nuw nsw i32 %conv5, 2
+  %arrayidx12 = getelementptr inbounds i8, i8* %c, i64 2
+  %2 = load i8, i8* %arrayidx12, align 1
+  %conv13 = zext i8 %2 to i32
+  %shl14 = shl nuw nsw i32 %conv13, 2
+  %arrayidx17 = getelementptr inbounds i8, i8* %c, i64 3
+  %3 = load i8, i8* %arrayidx17, align 1
+  %conv18 = zext i8 %3 to i32
+  %shl19 = shl nuw nsw i32 %conv18, 2
+  %sub = add nsw i32 undef, %shl6
+  %conv27 = sitofp i32 %sub to float
+  %div = fdiv float %conv27, undef
+  %add.ptr = getelementptr inbounds float, float* %d, i64 -1
+  store float %div, float* %add.ptr, align 4
+  %sub32 = add nsw i32 undef, %and
+  %conv33 = sitofp i32 %sub32 to float
+  %div36 = fdiv float %conv33, undef
+  %add.ptr37 = getelementptr inbounds float, float* %d, i64 -2
+  store float %div36, float* %add.ptr37, align 4
+  %sub40 = add nsw i32 undef, %shl19
+  %conv41 = sitofp i32 %sub40 to float
+  %div44 = fdiv float %conv41, undef
+  %add.ptr45 = getelementptr inbounds float, float* %d, i64 -3
+  store float %div44, float* %add.ptr45, align 4
+  %sub48 = add nsw i32 undef, %shl14
+  %conv49 = sitofp i32 %sub48 to float
+  %div52 = fdiv float %conv49, undef
+  %add.ptr53 = getelementptr inbounds float, float* %d, i64 -4
+  store float %div52, float* %add.ptr53, align 4
+  ret void
+}


        


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