[PATCH] D109726: [X86] Improve `matchBinaryShuffle()`'s `BLEND` lowering with per-element all-zero/all-ones knowledge
Simon Pilgrim via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Sep 17 05:48:40 PDT 2021
RKSimon accepted this revision.
RKSimon added a comment.
This revision is now accepted and ready to land.
In D109726#3005004 <https://reviews.llvm.org/D109726#3005004>, @lebedev.ri wrote:
> In D109726#3004107 <https://reviews.llvm.org/D109726#3004107>, @RKSimon wrote:
>
>> In D109726#2999993 <https://reviews.llvm.org/D109726#2999993>, @lebedev.ri wrote:
>>
>>> In D109726#2999987 <https://reviews.llvm.org/D109726#2999987>, @RKSimon wrote:
>>>
>>>> Why couldn't this be put in more generic ISD::OR combines somewhere? Possibly TargetLowering::SimplifyDemandedVectorElts?
>>>
>>> What do you mean by 'it'? `blend`->`or` lowering?
>>
>> The insert tests look like we're just failing to recognize that we're OR'ing all-ones elements, which should allow the SimplifyDemanded call to realise that we're going to completely overwrite those elements, so we don't need to mask them. Its most of the logic you've written but it feels like it should be somewhere more generic than inside x86 shuffle combining.
>
> https://reviews.llvm.org/D109927 - doesn't seem to work.
That's a shame - D109927 <https://reviews.llvm.org/D109927> seems to be useful, but not useful enough for our regression :(
I was kind of hoping we could avoid this - adding so much more shuffle code for so few regressions - but it seems to be the most straightforward fix atm, and will unblock the patch dependency tree you currently have - please can you add a TODO comment suggesting we review this in the future?
The only other possibility might be to perform OR/AND more aggressively for INSERT_VECTOR_ELT lowering for -1/0 elements?
================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:36240
+ APInt Mask = APInt::getZero(NumV1Elts);
+ Mask.setBit(V1EltIdx);
+ KnownBits ZZ = DAG.computeKnownBits(V1, Mask);
----------------
APInt Mask = APInt::getOneBitSet(NumV1Elts, V1EltIdx) ?
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https://reviews.llvm.org/D109726/new/
https://reviews.llvm.org/D109726
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