[PATCH] D109953: [X86] Combine the FADD(A, FMA(B, C, 0)) to FMA(B, C, A)

Pengfei Wang via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Sep 17 05:17:37 PDT 2021


pengfei added inline comments.


================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:47517-47518
+                                    Op0->getOperand(1), Op0->getOperand(2));
+        MulOp0 = CFmul.getOperand(0);
+        MulOp1 = CFmul.getOperand(1);
+        IsConj = Opcode == X86ISD::VFCMADDC;
----------------
Can these be
```
MulOp0 = Op0->getOperand(1);
MulOp1 = Op0->getOperand(2);
```


================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:47522
+    }
+    return !!MulOp0 && !!MulOp1;
   };
----------------
I think we can then use
```
if ((Opcode == X86ISD::VFMULC || Opcode == X86ISD::VFCMULC)) {
  ...
  return true;
}
if ((Opcode == X86ISD::VFMADDC || Opcode == X86ISD::VFCMADDC) ... {
  ...
  return true;
}
return false;
```


================
Comment at: llvm/lib/Target/X86/X86ISelLowering.cpp:47533-47534
   MVT CVT = MVT::getVectorVT(MVT::f32, VT.getVectorNumElements() / 2);
-  assert(CFmul->getValueType(0) == CVT && "Complex type mismatch");
+  assert((MulOp0->getValueType(0) == CVT && MulOp1->getValueType(0) == CVT) &&
+         "Complex type mismatch");
   FAddOp1 = DAG.getBitcast(CVT, FAddOp1);
----------------
I think we can remove the assert now.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D109953/new/

https://reviews.llvm.org/D109953



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