[PATCH] D108916: [RISCV] Optimize (add (shl x, c0), (shl y, c1)) with SH*ADD

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:6226
+  case ISD::ADD: {
+    SDValue NA = transformAddShlImm(N, DAG, Subtarget);
+    if (NA)
----------------
Move this into performADDCombine


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:5773-5774
+  EVT VT = N->getValueType(0);
+  if (VT.isVector() || VT.getSizeInBits() > Subtarget.getXLen())
+    return SDValue();
+
----------------
luismarques wrote:
> See craig's comment in D109729: The `VT.getSizeInBits() > Subtarget->getXLen()` should never fail. If the VT is scalar it must be XLenVT.
This comment was not correct for this patch. The XLen check is needed here.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D108916/new/

https://reviews.llvm.org/D108916