[PATCH] D109858: [GlobalISel][AMDGPU] Add a -final-dce-legalizer flag to clean up dead code after legalization.

[Jay Foad via Phabricator via llvm-commits]

foad added a comment.

> Why do these instructions not get deleted as-is?

Taking `test_fcos_v3s16` from `legalize-fcos.mir` as an example, in the first iteration of legalization, after processing InstList but before processing ArtifactList we have:

  bb.0:
    %13:_(<4 x s16>) = G_IMPLICIT_DEF
    %14:_(<4 x s16>) = G_IMPLICIT_DEF
    %15:_(<12 x s16>) = G_CONCAT_VECTORS %13:_(<4 x s16>), %14:_(<4 x s16>), %14:_(<4 x s16>)
    %0:_(<3 x s16>), %16:_(<3 x s16>), %17:_(<3 x s16>), %18:_(<3 x s16>) = G_UNMERGE_VALUES %15:_(<12 x s16>)
    %3:_(s16), %4:_(s16), %5:_(s16) = G_UNMERGE_VALUES %0:_(<3 x s16>)
    %9:_(s16) = G_FCONSTANT half 0xH3118
    %12:_(s16) = G_FMUL %3:_, %9:_
    %6:_(s16) = G_INTRINSIC intrinsic(@llvm.amdgcn.cos), %12:_(s16)
    %11:_(s16) = G_FMUL %4:_, %9:_
    %7:_(s16) = G_INTRINSIC intrinsic(@llvm.amdgcn.cos), %11:_(s16)
    %10:_(s16) = G_FMUL %5:_, %9:_
    %8:_(s16) = G_INTRINSIC intrinsic(@llvm.amdgcn.cos), %10:_(s16)
    %1:_(<3 x s16>) = G_BUILD_VECTOR %6:_(s16), %7:_(s16), %8:_(s16)
    %2:_(<3 x s32>) = G_ANYEXT %1:_(<3 x s16>)
    S_NOP 0, implicit %2:_(<3 x s32>)

But ArtifactList doesn't seem to be in any particular order because they get processed like this:

  Trying to combine: %0:_(<3 x s16>), %16:_(<3 x s16>), %17:_(<3 x s16>), %18:_(<3 x s16>) = G_UNMERGE_VALUES %15:_(<12 x s16>)
  .. Not combined, moving to instructions list
  Trying to combine: %15:_(<12 x s16>) = G_CONCAT_VECTORS %13:_(<4 x s16>), %14:_(<4 x s16>), %14:_(<4 x s16>)
  .. .. Changed MI: %0:_(<3 x s16>), %16:_(<3 x s16>), %17:_(<3 x s16>), %18:_(<3 x s16>) = G_UNMERGE_VALUES %15:_(<12 x s16>)
  CSEInfo::Recording new MI %0:_(<3 x s16>), %16:_(<3 x s16>), %17:_(<3 x s16>), %18:_(<3 x s16>) = G_UNMERGE_VALUES %15:_(<12 x s16>)
  .. Not combined, moving to instructions list
  Trying to combine: %0:_(<3 x s16>), %16:_(<3 x s16>), %17:_(<3 x s16>), %18:_(<3 x s16>) = G_UNMERGE_VALUES %15:_(<12 x s16>)
  .. Not combined, moving to instructions list
  Trying to combine: %1:_(<3 x s16>) = G_BUILD_VECTOR %6:_(s16), %7:_(s16), %8:_(s16)
  .. Not combined, moving to instructions list
  Trying to combine: %3:_(s16), %4:_(s16), %5:_(s16) = G_UNMERGE_VALUES %0:_(<3 x s16>)
  [...]

%3 does combine, which leaves %0 dead and it gets erased. But %15 does not get revisited after that.

If it tried to combine them in the order %3, %0, %15 it would spot that %15 is trivially dead.

I don't know how this is supposed to work. I can see that the initial InstList is populated so that we legalize in a strict bottom-up order, but that doesn't seem to work for ArtifactList.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D109858/new/

https://reviews.llvm.org/D109858