[PATCH] D93191: [PowerPC] Fold select_cc constants when comparing zero into trivial ops

[Sanjay Patel via Phabricator via llvm-commits]

spatel added a comment.

I'm not familiar with current PPC micro-arch details, so someone else should also look at this patch...
But this seems more restrictive than necessary. Don't we want to handle "x > -1" in addition to "x < 0"?

Note: I added regression tests with this comment to "llvm/test/CodeGen/PowerPC/select_const.ll" long ago:

  ; select Cond, C1, C2 --> add (mul (zext Cond), C1-C2), C2 --> add (and (sext Cond), C1-C2), C2

Also for the signbit compare pattern, we either have:
https://alive2.llvm.org/ce/z/jqcf8t (from the description)
or:
https://alive2.llvm.org/ce/z/YZyLpm

So we can always turn a 4-instruction `isel` sequence of arbitrary constants:

  li 4, -500
  cmpdi	3, 0
  li 3, -42
  isellt	3, 3, 4

into something like this:

  sradi 3, 3, 63
  andi. 3, 3, 458
  addi 3, 3, -500

So it always saves an instruction to convert to ALU ops?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D93191/new/

https://reviews.llvm.org/D93191