[PATCH] D108115: [llvm][sve] Lowering for VLS masked truncating stores

[Dave Green via Phabricator via llvm-commits]

dmgreen added a comment.

Thanks for fixing the MVE issues. Most of the changes here don't look SVE related, being generic DAG combines. It would probably be best to split them into a separate review to keep logically separable additions in different reviews in case there are issues with them.



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Comment at: llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp:9833
+    if (SDValue Shorter = DAG.GetDemandedBits(Value, TruncDemandedBits))
+      return DAG.getMaskedStore(Chain, SDLoc(N), Shorter, Ptr,
+                                MST->getOffset(), MST->getMask(),
----------------
Is this tested anywhere?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D108115/new/

https://reviews.llvm.org/D108115