[PATCH] D109729: [RISCV] Optimize (add (shl x, c0), (shl y, c1))
Ben Shi via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 14 23:22:19 PDT 2021
benshi001 updated this revision to Diff 372637.
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D109729/new/
https://reviews.llvm.org/D109729
Files:
llvm/lib/Target/RISCV/RISCVISelDAGToDAG.cpp
llvm/test/CodeGen/RISCV/rv32zba.ll
llvm/test/CodeGen/RISCV/rv64zba.ll
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