[PATCH] D109665: [AArch64][SVE] Add patterns to generate ADR instruction

Tue Sep 14 08:21:47 PDT 2021

paulwalker-arm added inline comments.

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Comment at: llvm/lib/Target/AArch64/AArch64SVEInstrInfo.td:1214
+    def : Pat<(add Ty:$Op1,
+                  (Ty (AArch64lsl_p (PredTy (AArch64ptrue 31)),
+                                          (Ty (and Ty:$Op2, (Ty (AArch64dup (i64 0xFFFFFFFF))))),
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Sorry I've fallen a bit behind on code reviews but will take a proper look later.  I did want to raise that we now have `SVEAllActive` that can be used instead of `AArch64ptrue 31` with the former catching more cases, looking through reinterprets for example.

Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D109665/new/

https://reviews.llvm.org/D109665