[llvm] 5041a48 - [PowerPC] Exploit Prefixed Load/Stores using the refactored Load/Store Implementation
Amy Kwan via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 14 06:40:00 PDT 2021
Author: Amy Kwan
Date: 2021-09-14T08:39:49-05:00
New Revision: 5041a485b948e55e54338779f2248c45402b0ae7
URL: https://github.com/llvm/llvm-project/commit/5041a485b948e55e54338779f2248c45402b0ae7
DIFF: https://github.com/llvm/llvm-project/commit/5041a485b948e55e54338779f2248c45402b0ae7.diff
LOG: [PowerPC] Exploit Prefixed Load/Stores using the refactored Load/Store Implementation
This patch exploits the prefixed load and store instructions utilizing the
refactored load/store implementation introduced in D93370.
Prefixed load and store instructions are emitted whenever we are loading or
storing a value with an offset that fits into a 34-bit signed immediate.
Patterns for the prefixed load and stores are added in this patch, as well as
the implementation that detects when we are loading and storing a value with an
offset that fits in 34-bits.
Differential Revision: https://reviews.llvm.org/D96075
Added:
llvm/test/CodeGen/PowerPC/p10-fi-elim.ll
Modified:
llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
llvm/lib/Target/PowerPC/PPCISelLowering.cpp
llvm/lib/Target/PowerPC/PPCISelLowering.h
llvm/lib/Target/PowerPC/PPCInstrInfo.td
llvm/lib/Target/PowerPC/PPCInstrPrefix.td
llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
llvm/test/CodeGen/PowerPC/aix-vec_insert_elt.ll
llvm/test/CodeGen/PowerPC/atomics-i16-ldst.ll
llvm/test/CodeGen/PowerPC/atomics-i32-ldst.ll
llvm/test/CodeGen/PowerPC/atomics-i64-ldst.ll
llvm/test/CodeGen/PowerPC/atomics-i8-ldst.ll
llvm/test/CodeGen/PowerPC/f128_ldst.ll
llvm/test/CodeGen/PowerPC/int128_ldst.ll
llvm/test/CodeGen/PowerPC/mma-acc-memops.ll
llvm/test/CodeGen/PowerPC/mma-intrinsics.ll
llvm/test/CodeGen/PowerPC/paired-vector-intrinsics.ll
llvm/test/CodeGen/PowerPC/pcrel_ldst.ll
llvm/test/CodeGen/PowerPC/scalar-double-ldst.ll
llvm/test/CodeGen/PowerPC/scalar-float-ldst.ll
llvm/test/CodeGen/PowerPC/scalar-i16-ldst.ll
llvm/test/CodeGen/PowerPC/scalar-i32-ldst.ll
llvm/test/CodeGen/PowerPC/scalar-i64-ldst.ll
llvm/test/CodeGen/PowerPC/scalar-i8-ldst.ll
llvm/test/CodeGen/PowerPC/vec_insert_elt.ll
llvm/test/CodeGen/PowerPC/vector-ldst.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
index 1d95394ee3182..93fae891dd9b3 100644
--- a/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
@@ -270,6 +270,13 @@ namespace {
None) == PPC::AM_PCRel;
}
+ /// SelectPDForm - Returns true if address N can be represented by Prefixed
+ /// DForm addressing mode (a base register, plus a signed 34-bit immediate.
+ bool SelectPDForm(SDNode *Parent, SDValue N, SDValue &Disp, SDValue &Base) {
+ return PPCLowering->SelectOptimalAddrMode(Parent, N, Disp, Base, *CurDAG,
+ None) == PPC::AM_PrefixDForm;
+ }
+
/// SelectXForm - Returns true if address N can be represented by the
/// addressing mode of XForm instructions (an indexed [r+r] operation).
bool SelectXForm(SDNode *Parent, SDValue N, SDValue &Disp, SDValue &Base) {
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
index 771cf8d661b22..85b62f61a4d87 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.cpp
@@ -1518,10 +1518,9 @@ void PPCTargetLowering::initializeAddrModeMap() {
PPC::MOF_RPlusSImm16Mult16 | PPC::MOF_Vector | PPC::MOF_SubtargetP9,
PPC::MOF_NotAddNorCst | PPC::MOF_Vector | PPC::MOF_SubtargetP9,
PPC::MOF_AddrIsSImm32 | PPC::MOF_Vector | PPC::MOF_SubtargetP9,
- PPC::MOF_RPlusSImm16Mult16 | PPC::MOF_Vector256 | PPC::MOF_SubtargetP10,
- PPC::MOF_NotAddNorCst | PPC::MOF_Vector256 | PPC::MOF_SubtargetP10,
- PPC::MOF_AddrIsSImm32 | PPC::MOF_Vector256 | PPC::MOF_SubtargetP10,
};
+ AddrModesMap[PPC::AM_PrefixDForm] = {PPC::MOF_RPlusSImm34 |
+ PPC::MOF_SubtargetP10};
// TODO: Add mapping for quadword load/store.
}
@@ -17267,6 +17266,9 @@ PPC::AddrMode PPCTargetLowering::getAddrModeForFlags(unsigned Flags) const {
for (auto FlagSet : AddrModesMap.at(PPC::AM_DQForm))
if ((Flags & FlagSet) == FlagSet)
return PPC::AM_DQForm;
+ for (auto FlagSet : AddrModesMap.at(PPC::AM_PrefixDForm))
+ if ((Flags & FlagSet) == FlagSet)
+ return PPC::AM_PrefixDForm;
// If no other forms are selected, return an X-Form as it is the most
// general addressing mode.
return PPC::AM_XForm;
@@ -17386,6 +17388,22 @@ unsigned PPCTargetLowering::computeMOFlags(const SDNode *Parent, SDValue N,
if ((FlagSet & PPC::MOF_SubtargetP10) && isPCRelNode(N))
return FlagSet;
+ // If the node is the paired load/store intrinsics, compute flags for
+ // address computation and return early.
+ unsigned ParentOp = Parent->getOpcode();
+ if (Subtarget.isISA3_1() && ((ParentOp == ISD::INTRINSIC_W_CHAIN) ||
+ (ParentOp == ISD::INTRINSIC_VOID))) {
+ unsigned ID = cast<ConstantSDNode>(Parent->getOperand(1))->getZExtValue();
+ assert(
+ ((ID == Intrinsic::ppc_vsx_lxvp) || (ID == Intrinsic::ppc_vsx_stxvp)) &&
+ "Only the paired load and store (lxvp/stxvp) intrinsics are valid.");
+ SDValue IntrinOp = (ID == Intrinsic::ppc_vsx_lxvp) ? Parent->getOperand(2)
+ : Parent->getOperand(3);
+ computeFlagsForAddressComputation(IntrinOp, FlagSet, DAG);
+ FlagSet |= PPC::MOF_Vector;
+ return FlagSet;
+ }
+
// Mark this as something we don't want to handle here if it is atomic
// or pre-increment instruction.
if (const LSBaseSDNode *LSB = dyn_cast<LSBaseSDNode>(Parent))
@@ -17410,9 +17428,12 @@ unsigned PPCTargetLowering::computeMOFlags(const SDNode *Parent, SDValue N,
} else if (MemVT.isVector() && !MemVT.isFloatingPoint()) { // Integer vectors.
if (Size == 128)
FlagSet |= PPC::MOF_Vector;
- else if (Size == 256)
- FlagSet |= PPC::MOF_Vector256;
- else
+ else if (Size == 256) {
+ assert(Subtarget.pairedVectorMemops() &&
+ "256-bit vectors are only available when paired vector memops is "
+ "enabled!");
+ FlagSet |= PPC::MOF_Vector;
+ } else
llvm_unreachable("Not expecting illegal vectors!");
} else { // Floating point type: can be scalar, f128 or vector types.
if (Size == 32 || Size == 64)
@@ -17609,6 +17630,24 @@ PPC::AddrMode PPCTargetLowering::SelectOptimalAddrMode(const SDNode *Parent,
Base = N;
break;
}
+ case PPC::AM_PrefixDForm: {
+ int64_t Imm34 = 0;
+ unsigned Opcode = N.getOpcode();
+ if (((Opcode == ISD::ADD) || (Opcode == ISD::OR)) &&
+ (isIntS34Immediate(N.getOperand(1), Imm34))) {
+ // N is an Add/OR Node, and it's operand is a 34-bit signed immediate.
+ Disp = DAG.getTargetConstant(Imm34, DL, N.getValueType());
+ if (FrameIndexSDNode *FI = dyn_cast<FrameIndexSDNode>(N.getOperand(0)))
+ Base = DAG.getTargetFrameIndex(FI->getIndex(), N.getValueType());
+ else
+ Base = N.getOperand(0);
+ } else if (isIntS34Immediate(N, Imm34)) {
+ // The address is a 34-bit signed immediate.
+ Disp = DAG.getTargetConstant(Imm34, DL, N.getValueType());
+ Base = DAG.getRegister(PPC::ZERO8, N.getValueType());
+ }
+ break;
+ }
case PPC::AM_PCRel: {
// When selecting PC-Relative instructions, "Base" is not utilized as
// we select the address as [PC+imm].
diff --git a/llvm/lib/Target/PowerPC/PPCISelLowering.h b/llvm/lib/Target/PowerPC/PPCISelLowering.h
index fd33eea2903ae..57296a3ccfc7d 100644
--- a/llvm/lib/Target/PowerPC/PPCISelLowering.h
+++ b/llvm/lib/Target/PowerPC/PPCISelLowering.h
@@ -717,6 +717,7 @@ namespace llvm {
AM_DForm,
AM_DSForm,
AM_DQForm,
+ AM_PrefixDForm,
AM_XForm,
AM_PCRel
};
diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.td b/llvm/lib/Target/PowerPC/PPCInstrInfo.td
index b4a3f8e34fdec..c87beef5c99cd 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.td
@@ -1159,6 +1159,7 @@ def DQForm : ComplexPattern<iPTR, 2, "SelectDQForm", [], [SDNPWantParent]>;
def XForm : ComplexPattern<iPTR, 2, "SelectXForm", [], [SDNPWantParent]>;
def ForceXForm : ComplexPattern<iPTR, 2, "SelectForceXForm", [], [SDNPWantParent]>;
def PCRelForm : ComplexPattern<iPTR, 2, "SelectPCRelForm", [], [SDNPWantParent]>;
+def PDForm : ComplexPattern<iPTR, 2, "SelectPDForm", [], [SDNPWantParent]>;
//===----------------------------------------------------------------------===//
// PowerPC Instruction Predicate Definitions.
diff --git a/llvm/lib/Target/PowerPC/PPCInstrPrefix.td b/llvm/lib/Target/PowerPC/PPCInstrPrefix.td
index c5a53ea05f1a6..8738426bf3f68 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrPrefix.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrPrefix.td
@@ -1666,18 +1666,18 @@ let mayLoad = 0, mayStore = 1, Predicates = [PairedVectorMemops, PrefixInstrs] i
let Predicates = [PairedVectorMemops] in {
// Intrinsics for Paired Vector Loads.
- def : Pat<(v256i1 (int_ppc_vsx_lxvp iaddrX16:$src)), (LXVP memrix16:$src)>;
- def : Pat<(v256i1 (int_ppc_vsx_lxvp xaddrX16:$src)), (LXVPX xaddrX16:$src)>;
+ def : Pat<(v256i1 (int_ppc_vsx_lxvp DQForm:$src)), (LXVP memrix16:$src)>;
+ def : Pat<(v256i1 (int_ppc_vsx_lxvp XForm:$src)), (LXVPX XForm:$src)>;
let Predicates = [PairedVectorMemops, PrefixInstrs] in {
- def : Pat<(v256i1 (int_ppc_vsx_lxvp iaddrX34:$src)), (PLXVP memri34:$src)>;
+ def : Pat<(v256i1 (int_ppc_vsx_lxvp PDForm:$src)), (PLXVP memri34:$src)>;
}
// Intrinsics for Paired Vector Stores.
- def : Pat<(int_ppc_vsx_stxvp v256i1:$XSp, iaddrX16:$dst),
+ def : Pat<(int_ppc_vsx_stxvp v256i1:$XSp, DQForm:$dst),
(STXVP $XSp, memrix16:$dst)>;
- def : Pat<(int_ppc_vsx_stxvp v256i1:$XSp, xaddrX16:$dst),
- (STXVPX $XSp, xaddrX16:$dst)>;
+ def : Pat<(int_ppc_vsx_stxvp v256i1:$XSp, XForm:$dst),
+ (STXVPX $XSp, XForm:$dst)>;
let Predicates = [PairedVectorMemops, PrefixInstrs] in {
- def : Pat<(int_ppc_vsx_stxvp v256i1:$XSp, iaddrX34:$dst),
+ def : Pat<(int_ppc_vsx_stxvp v256i1:$XSp, PDForm:$dst),
(PSTXVP $XSp, memri34:$dst)>;
}
}
@@ -2671,6 +2671,45 @@ def : Pat<(f64 nzFPImmAsi64:$A),
// nand(A, nand(B, C))
def : xxevalPattern<(or (vnot v4i32:$vA), (and v4i32:$vB, v4i32:$vC)),
!sub(255, 14)>;
+
+ // Anonymous patterns to select prefixed VSX loads and stores.
+ // Load / Store f128
+ def : Pat<(f128 (load PDForm:$src)),
+ (COPY_TO_REGCLASS (PLXV memri34:$src), VRRC)>;
+ def : Pat<(store f128:$XS, PDForm:$dst),
+ (PSTXV (COPY_TO_REGCLASS $XS, VSRC), memri34:$dst)>;
+
+ // Load / Store v4i32
+ def : Pat<(v4i32 (load PDForm:$src)), (PLXV memri34:$src)>;
+ def : Pat<(store v4i32:$XS, PDForm:$dst), (PSTXV $XS, memri34:$dst)>;
+
+ // Load / Store v2i64
+ def : Pat<(v2i64 (load PDForm:$src)), (PLXV memri34:$src)>;
+ def : Pat<(store v2i64:$XS, PDForm:$dst), (PSTXV $XS, memri34:$dst)>;
+
+ // Load / Store v4f32
+ def : Pat<(v4f32 (load PDForm:$src)), (PLXV memri34:$src)>;
+ def : Pat<(store v4f32:$XS, PDForm:$dst), (PSTXV $XS, memri34:$dst)>;
+
+ // Load / Store v2f64
+ def : Pat<(v2f64 (load PDForm:$src)), (PLXV memri34:$src)>;
+ def : Pat<(store v2f64:$XS, PDForm:$dst), (PSTXV $XS, memri34:$dst)>;
+
+ // Cases For PPCstore_scal_int_from_vsr
+ def : Pat<(PPCstore_scal_int_from_vsr
+ (f64 (PPCcv_fp_to_uint_in_vsr f64:$src)), PDForm:$dst, 8),
+ (PSTXSD (XSCVDPUXDS f64:$src), PDForm:$dst)>;
+ def : Pat<(PPCstore_scal_int_from_vsr
+ (f64 (PPCcv_fp_to_sint_in_vsr f64:$src)), PDForm:$dst, 8),
+ (PSTXSD (XSCVDPSXDS f64:$src), PDForm:$dst)>;
+ def : Pat<(PPCstore_scal_int_from_vsr
+ (f64 (PPCcv_fp_to_uint_in_vsr f128:$src)), PDForm:$dst, 8),
+ (PSTXSD (COPY_TO_REGCLASS (XSCVQPUDZ f128:$src), VFRC),
+ PDForm:$dst)>;
+ def : Pat<(PPCstore_scal_int_from_vsr
+ (f64 (PPCcv_fp_to_sint_in_vsr f128:$src)), PDForm:$dst, 8),
+ (PSTXSD (COPY_TO_REGCLASS (XSCVQPSDZ f128:$src), VFRC),
+ PDForm:$dst)>;
}
let Predicates = [PrefixInstrs] in {
@@ -2694,6 +2733,63 @@ let Predicates = [PrefixInstrs] in {
(XXBLENDVW $A, $B, $C)>;
def : Pat<(int_ppc_vsx_xxblendvd v2i64:$A, v2i64:$B, v2i64:$C),
(XXBLENDVD $A, $B, $C)>;
+
+ // Anonymous patterns to select prefixed loads and stores.
+ // Load i32
+ def : Pat<(i32 (extloadi1 PDForm:$src)), (PLBZ memri34:$src)>;
+ def : Pat<(i32 (zextloadi1 PDForm:$src)), (PLBZ memri34:$src)>;
+ def : Pat<(i32 (extloadi8 PDForm:$src)), (PLBZ memri34:$src)>;
+ def : Pat<(i32 (zextloadi8 PDForm:$src)), (PLBZ memri34:$src)>;
+ def : Pat<(i32 (extloadi16 PDForm:$src)), (PLHZ memri34:$src)>;
+ def : Pat<(i32 (zextloadi16 PDForm:$src)), (PLHZ memri34:$src)>;
+ def : Pat<(i32 (sextloadi16 PDForm:$src)), (PLHA memri34:$src)>;
+ def : Pat<(i32 (load PDForm:$src)), (PLWZ memri34:$src)>;
+
+ // Store i32
+ def : Pat<(truncstorei8 i32:$rS, PDForm:$dst), (PSTB gprc:$rS, memri34:$dst)>;
+ def : Pat<(truncstorei16 i32:$rS, PDForm:$dst), (PSTH gprc:$rS, memri34:$dst)>;
+ def : Pat<(store i32:$rS, PDForm:$dst), (PSTW gprc:$rS, memri34:$dst)>;
+
+ // Load i64
+ def : Pat<(i64 (extloadi1 PDForm:$src)), (PLBZ8 memri34:$src)>;
+ def : Pat<(i64 (zextloadi1 PDForm:$src)), (PLBZ8 memri34:$src)>;
+ def : Pat<(i64 (extloadi8 PDForm:$src)), (PLBZ8 memri34:$src)>;
+ def : Pat<(i64 (zextloadi8 PDForm:$src)), (PLBZ8 memri34:$src)>;
+ def : Pat<(i64 (extloadi16 PDForm:$src)), (PLHZ8 memri34:$src)>;
+ def : Pat<(i64 (zextloadi16 PDForm:$src)), (PLHZ8 memri34:$src)>;
+ def : Pat<(i64 (sextloadi16 PDForm:$src)), (PLHA8 memri34:$src)>;
+ def : Pat<(i64 (extloadi32 PDForm:$src)), (PLWZ8 memri34:$src)>;
+ def : Pat<(i64 (zextloadi32 PDForm:$src)), (PLWZ8 memri34:$src)>;
+ def : Pat<(i64 (sextloadi32 PDForm:$src)), (PLWA8 memri34:$src)>;
+ def : Pat<(i64 (load PDForm:$src)), (PLD memri34:$src)>;
+
+ // Store i64
+ def : Pat<(truncstorei8 i64:$rS, PDForm:$dst), (PSTB8 g8rc:$rS, memri34:$dst)>;
+ def : Pat<(truncstorei16 i64:$rS, PDForm:$dst), (PSTH8 g8rc:$rS, memri34:$dst)>;
+ def : Pat<(truncstorei32 i64:$rS, PDForm:$dst), (PSTW8 g8rc:$rS, memri34:$dst)>;
+ def : Pat<(store i64:$rS, PDForm:$dst), (PSTD g8rc:$rS, memri34:$dst)>;
+
+ // Load / Store f32
+ def : Pat<(f32 (load PDForm:$src)), (PLFS memri34:$src)>;
+ def : Pat<(store f32:$FRS, PDForm:$dst), (PSTFS $FRS, memri34:$dst)>;
+
+ // Load / Store f64
+ def : Pat<(f64 (extloadf32 PDForm:$src)),
+ (COPY_TO_REGCLASS (PLFS memri34:$src), VSFRC)>;
+ def : Pat<(f64 (load PDForm:$src)), (PLFD memri34:$src)>;
+ def : Pat<(store f64:$FRS, PDForm:$dst), (PSTFD $FRS, memri34:$dst)>;
+
+ // Atomic Load
+ def : Pat<(atomic_load_8 PDForm:$src), (PLBZ memri34:$src)>;
+ def : Pat<(atomic_load_16 PDForm:$src), (PLHZ memri34:$src)>;
+ def : Pat<(atomic_load_32 PDForm:$src), (PLWZ memri34:$src)>;
+ def : Pat<(atomic_load_64 PDForm:$src), (PLD memri34:$src)>;
+
+ // Atomic Store
+ def : Pat<(atomic_store_8 PDForm:$dst, i32:$RS), (PSTB $RS, memri34:$dst)>;
+ def : Pat<(atomic_store_16 PDForm:$dst, i32:$RS), (PSTH $RS, memri34:$dst)>;
+ def : Pat<(atomic_store_32 PDForm:$dst, i32:$RS), (PSTW $RS, memri34:$dst)>;
+ def : Pat<(atomic_store_64 PDForm:$dst, i64:$RS), (PSTD $RS, memri34:$dst)>;
}
def InsertEltShift {
diff --git a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
index ca8ca80a7f575..4bccc5596d2b8 100644
--- a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
@@ -135,6 +135,23 @@ PPCRegisterInfo::PPCRegisterInfo(const PPCTargetMachine &TM)
ImmToIdxMap[PPC::SPELWZ] = PPC::SPELWZX;
// Power10
+ ImmToIdxMap[PPC::PLBZ] = PPC::LBZX; ImmToIdxMap[PPC::PLBZ8] = PPC::LBZX8;
+ ImmToIdxMap[PPC::PLHZ] = PPC::LHZX; ImmToIdxMap[PPC::PLHZ8] = PPC::LHZX8;
+ ImmToIdxMap[PPC::PLHA] = PPC::LHAX; ImmToIdxMap[PPC::PLHA8] = PPC::LHAX8;
+ ImmToIdxMap[PPC::PLWZ] = PPC::LWZX; ImmToIdxMap[PPC::PLWZ8] = PPC::LWZX8;
+ ImmToIdxMap[PPC::PLWA] = PPC::LWAX; ImmToIdxMap[PPC::PLWA8] = PPC::LWAX;
+ ImmToIdxMap[PPC::PLD] = PPC::LDX; ImmToIdxMap[PPC::PSTD] = PPC::STDX;
+
+ ImmToIdxMap[PPC::PSTB] = PPC::STBX; ImmToIdxMap[PPC::PSTB8] = PPC::STBX8;
+ ImmToIdxMap[PPC::PSTH] = PPC::STHX; ImmToIdxMap[PPC::PSTH8] = PPC::STHX8;
+ ImmToIdxMap[PPC::PSTW] = PPC::STWX; ImmToIdxMap[PPC::PSTW8] = PPC::STWX8;
+
+ ImmToIdxMap[PPC::PLFS] = PPC::LFSX; ImmToIdxMap[PPC::PSTFS] = PPC::STFSX;
+ ImmToIdxMap[PPC::PLFD] = PPC::LFDX; ImmToIdxMap[PPC::PSTFD] = PPC::STFDX;
+ ImmToIdxMap[PPC::PLXSSP] = PPC::LXSSPX; ImmToIdxMap[PPC::PSTXSSP] = PPC::STXSSPX;
+ ImmToIdxMap[PPC::PLXSD] = PPC::LXSDX; ImmToIdxMap[PPC::PSTXSD] = PPC::STXSDX;
+ ImmToIdxMap[PPC::PLXV] = PPC::LXVX; ImmToIdxMap[PPC::PSTXV] = PPC::STXVX;
+
ImmToIdxMap[PPC::LXVP] = PPC::LXVPX;
ImmToIdxMap[PPC::STXVP] = PPC::STXVPX;
ImmToIdxMap[PPC::PLXVP] = PPC::LXVPX;
@@ -1347,7 +1364,7 @@ PPCRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
MachineFunction &MF = *MBB.getParent();
const PPCSubtarget &Subtarget = MF.getSubtarget<PPCSubtarget>();
// Get the instruction info.
- const TargetInstrInfo &TII = *Subtarget.getInstrInfo();
+ const PPCInstrInfo &TII = *Subtarget.getInstrInfo();
// Get the frame info.
MachineFrameInfo &MFI = MF.getFrameInfo();
DebugLoc dl = MI.getDebugLoc();
@@ -1459,7 +1476,7 @@ PPCRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
bool OffsetFitsMnemonic = (OpC == PPC::EVSTDD || OpC == PPC::EVLDD) ?
isUInt<8>(Offset) :
isInt<16>(Offset);
- if (OpC == PPC::PLXVP || OpC == PPC::PSTXVP)
+ if (TII.isPrefixed(MI.getOpcode()))
OffsetFitsMnemonic = isInt<34>(Offset);
if (!noImmForm && ((OffsetFitsMnemonic &&
((Offset % offsetMinAlign(MI)) == 0)) ||
diff --git a/llvm/test/CodeGen/PowerPC/aix-vec_insert_elt.ll b/llvm/test/CodeGen/PowerPC/aix-vec_insert_elt.ll
index abcd8ff39ddab..feff985f83f68 100644
--- a/llvm/test/CodeGen/PowerPC/aix-vec_insert_elt.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-vec_insert_elt.ll
@@ -667,7 +667,7 @@ define <2 x double> @testDouble2(<2 x double> %a, i8* %b, i32 zeroext %idx1, i32
; CHECK-32-P10-NEXT: rlwinm 5, 5, 3, 28, 28
; CHECK-32-P10-NEXT: stfdx 0, 6, 4
; CHECK-32-P10-NEXT: lxv 0, -32(1)
-; CHECK-32-P10-NEXT: lfd 1, 1(3)
+; CHECK-32-P10-NEXT: plfd 1, 1(3), 0
; CHECK-32-P10-NEXT: addi 3, 1, -16
; CHECK-32-P10-NEXT: stxv 0, -16(1)
; CHECK-32-P10-NEXT: stfdx 1, 3, 5
@@ -737,12 +737,11 @@ define <2 x double> @testDouble3(<2 x double> %a, i8* %b, i32 zeroext %idx1, i32
;
; CHECK-32-P10-LABEL: testDouble3:
; CHECK-32-P10: # %bb.0: # %entry
-; CHECK-32-P10-NEXT: lis 6, 1
-; CHECK-32-P10-NEXT: rlwinm 4, 4, 3, 28, 28
-; CHECK-32-P10-NEXT: rlwinm 5, 5, 3, 28, 28
-; CHECK-32-P10-NEXT: lfdx 0, 3, 6
-; CHECK-32-P10-NEXT: addi 6, 1, -32
+; CHECK-32-P10-NEXT: plfd 0, 65536(3), 0
+; CHECK-32-P10-DAG: addi 6, 1, -32
+; CHECK-32-P10-DAG: rlwinm 4, 4, 3, 28, 28
; CHECK-32-P10-NEXT: stxv 34, -32(1)
+; CHECK-32-P10-NEXT: rlwinm 5, 5, 3, 28, 28
; CHECK-32-P10-NEXT: stfdx 0, 6, 4
; CHECK-32-P10-NEXT: lxv 0, -32(1)
; CHECK-32-P10-NEXT: lfd 1, 0(3)
@@ -874,15 +873,13 @@ define <2 x double> @testDoubleImm4(<2 x double> %a, i32* %b) {
;
; CHECK-64-P10-LABEL: testDoubleImm4:
; CHECK-64-P10: # %bb.0: # %entry
-; CHECK-64-P10-NEXT: lis 4, 4
-; CHECK-64-P10-NEXT: lfdx 0, 3, 4
+; CHECK-64-P10-NEXT: plfd 0, 262144(3), 0
; CHECK-64-P10-NEXT: xxpermdi 34, 0, 34, 1
; CHECK-64-P10-NEXT: blr
;
; CHECK-32-P10-LABEL: testDoubleImm4:
; CHECK-32-P10: # %bb.0: # %entry
-; CHECK-32-P10-NEXT: lis 4, 4
-; CHECK-32-P10-NEXT: lfdx 0, 3, 4
+; CHECK-32-P10-NEXT: plfd 0, 262144(3), 0
; CHECK-32-P10-NEXT: xxpermdi 34, 0, 34, 1
; CHECK-32-P10-NEXT: blr
entry:
diff --git a/llvm/test/CodeGen/PowerPC/atomics-i16-ldst.ll b/llvm/test/CodeGen/PowerPC/atomics-i16-ldst.ll
index d7dfc56253c71..e2f9451632b4f 100644
--- a/llvm/test/CodeGen/PowerPC/atomics-i16-ldst.ll
+++ b/llvm/test/CodeGen/PowerPC/atomics-i16-ldst.ll
@@ -50,8 +50,7 @@ entry:
define dso_local signext i16 @ld_align32_int16_t_uint8_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_int16_t_uint8_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 99999000(r3), 0
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
@@ -181,8 +180,7 @@ define dso_local signext i16 @ld_disjoint_align32_int16_t_uint8_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 999990000(r3), 0
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
@@ -356,8 +354,7 @@ entry:
define dso_local signext i16 @ld_align32_int16_t_int8_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_int16_t_int8_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 99999000(r3), 0
; CHECK-P10-NEXT: extsb r3, r3
; CHECK-P10-NEXT: blr
;
@@ -487,8 +484,7 @@ define dso_local signext i16 @ld_disjoint_align32_int16_t_int8_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 999990000(r3), 0
; CHECK-P10-NEXT: extsb r3, r3
; CHECK-P10-NEXT: blr
;
@@ -661,8 +657,7 @@ entry:
define dso_local signext i16 @ld_align32_int16_t_uint16_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_int16_t_uint16_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lhzx r3, r3, r4
+; CHECK-P10-NEXT: plhz r3, 99999000(r3), 0
; CHECK-P10-NEXT: extsh r3, r3
; CHECK-P10-NEXT: blr
;
@@ -788,8 +783,7 @@ define dso_local signext i16 @ld_disjoint_align32_int16_t_uint16_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lhzx r3, r3, r4
+; CHECK-P10-NEXT: plhz r3, 999990000(r3), 0
; CHECK-P10-NEXT: extsh r3, r3
; CHECK-P10-NEXT: blr
;
@@ -958,8 +952,7 @@ entry:
define dso_local signext i16 @ld_align32_int16_t_uint32_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_int16_t_uint32_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lwzx r3, r3, r4
+; CHECK-P10-NEXT: plwz r3, 99999000(r3), 0
; CHECK-P10-NEXT: extsh r3, r3
; CHECK-P10-NEXT: blr
;
@@ -1092,8 +1085,7 @@ define dso_local signext i16 @ld_disjoint_align32_int16_t_uint32_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lwzx r3, r3, r4
+; CHECK-P10-NEXT: plwz r3, 999990000(r3), 0
; CHECK-P10-NEXT: extsh r3, r3
; CHECK-P10-NEXT: blr
;
@@ -1268,8 +1260,7 @@ entry:
define dso_local signext i16 @ld_align32_int16_t_uint64_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_int16_t_uint64_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: ldx r3, r3, r4
+; CHECK-P10-NEXT: pld r3, 99999000(r3), 0
; CHECK-P10-NEXT: extsh r3, r3
; CHECK-P10-NEXT: blr
;
@@ -1402,8 +1393,7 @@ define dso_local signext i16 @ld_disjoint_align32_int16_t_uint64_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: ldx r3, r3, r4
+; CHECK-P10-NEXT: pld r3, 999990000(r3), 0
; CHECK-P10-NEXT: extsh r3, r3
; CHECK-P10-NEXT: blr
;
@@ -1577,8 +1567,7 @@ entry:
define dso_local zeroext i16 @ld_align32_uint16_t_uint8_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_uint16_t_uint8_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 99999000(r3), 0
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
@@ -1708,8 +1697,7 @@ define dso_local zeroext i16 @ld_disjoint_align32_uint16_t_uint8_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 999990000(r3), 0
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
@@ -1885,8 +1873,7 @@ entry:
define dso_local zeroext i16 @ld_align32_uint16_t_int8_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_uint16_t_int8_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 99999000(r3), 0
; CHECK-P10-NEXT: extsb r3, r3
; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
@@ -2025,8 +2012,7 @@ define dso_local zeroext i16 @ld_disjoint_align32_uint16_t_int8_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 999990000(r3), 0
; CHECK-P10-NEXT: extsb r3, r3
; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
@@ -2210,8 +2196,7 @@ entry:
define dso_local zeroext i16 @ld_align32_uint16_t_uint16_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_uint16_t_uint16_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lhzx r3, r3, r4
+; CHECK-P10-NEXT: plhz r3, 99999000(r3), 0
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
@@ -2337,8 +2322,7 @@ define dso_local zeroext i16 @ld_disjoint_align32_uint16_t_uint16_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lhzx r3, r3, r4
+; CHECK-P10-NEXT: plhz r3, 999990000(r3), 0
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
@@ -2507,8 +2491,7 @@ entry:
define dso_local zeroext i16 @ld_align32_uint16_t_uint32_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_uint16_t_uint32_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lwzx r3, r3, r4
+; CHECK-P10-NEXT: plwz r3, 99999000(r3), 0
; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
@@ -2641,8 +2624,7 @@ define dso_local zeroext i16 @ld_disjoint_align32_uint16_t_uint32_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lwzx r3, r3, r4
+; CHECK-P10-NEXT: plwz r3, 999990000(r3), 0
; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
@@ -2817,8 +2799,7 @@ entry:
define dso_local zeroext i16 @ld_align32_uint16_t_uint64_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_uint16_t_uint64_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: ldx r3, r3, r4
+; CHECK-P10-NEXT: pld r3, 99999000(r3), 0
; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
@@ -2951,8 +2932,7 @@ define dso_local zeroext i16 @ld_disjoint_align32_uint16_t_uint64_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: ldx r3, r3, r4
+; CHECK-P10-NEXT: pld r3, 999990000(r3), 0
; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
;
@@ -3124,8 +3104,7 @@ entry:
define dso_local void @st_align32_uint16_t_uint8_t(i8* nocapture %ptr, i16 zeroext %str) {
; CHECK-P10-LABEL: st_align32_uint16_t_uint8_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r5, 99999000
-; CHECK-P10-NEXT: stbx r4, r3, r5
+; CHECK-P10-NEXT: pstb r4, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_uint16_t_uint8_t:
@@ -3246,8 +3225,7 @@ define dso_local void @st_disjoint_align32_uint16_t_uint8_t(i64 %ptr, i16 zeroex
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r5, -15264
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: pli r5, 999990000
-; CHECK-P10-NEXT: stbx r4, r3, r5
+; CHECK-P10-NEXT: pstb r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint16_t_uint8_t:
@@ -3407,8 +3385,7 @@ entry:
define dso_local void @st_align32_uint16_t_uint16_t(i8* nocapture %ptr, i16 zeroext %str) {
; CHECK-P10-LABEL: st_align32_uint16_t_uint16_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r5, 99999000
-; CHECK-P10-NEXT: sthx r4, r3, r5
+; CHECK-P10-NEXT: psth r4, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_uint16_t_uint16_t:
@@ -3525,8 +3502,7 @@ define dso_local void @st_disjoint_align32_uint16_t_uint16_t(i64 %ptr, i16 zeroe
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r5, -15264
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: pli r5, 999990000
-; CHECK-P10-NEXT: sthx r4, r3, r5
+; CHECK-P10-NEXT: psth r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint16_t_uint16_t:
@@ -3682,8 +3658,7 @@ entry:
define dso_local void @st_align32_uint16_t_uint32_t(i8* nocapture %ptr, i16 zeroext %str) {
; CHECK-P10-LABEL: st_align32_uint16_t_uint32_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r5, 99999000
-; CHECK-P10-NEXT: stwx r4, r3, r5
+; CHECK-P10-NEXT: pstw r4, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_uint16_t_uint32_t:
@@ -3807,8 +3782,7 @@ define dso_local void @st_disjoint_align32_uint16_t_uint32_t(i64 %ptr, i16 zeroe
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r5, -15264
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: pli r5, 999990000
-; CHECK-P10-NEXT: stwx r4, r3, r5
+; CHECK-P10-NEXT: pstw r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint16_t_uint32_t:
@@ -3970,8 +3944,7 @@ entry:
define dso_local void @st_align32_uint16_t_uint64_t(i8* nocapture %ptr, i16 zeroext %str) {
; CHECK-P10-LABEL: st_align32_uint16_t_uint64_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r5, 99999000
-; CHECK-P10-NEXT: stdx r4, r3, r5
+; CHECK-P10-NEXT: pstd r4, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_uint16_t_uint64_t:
@@ -4095,8 +4068,7 @@ define dso_local void @st_disjoint_align32_uint16_t_uint64_t(i64 %ptr, i16 zeroe
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r5, -15264
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: pli r5, 999990000
-; CHECK-P10-NEXT: stdx r4, r3, r5
+; CHECK-P10-NEXT: pstd r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint16_t_uint64_t:
@@ -4258,8 +4230,7 @@ entry:
define dso_local void @st_align32_int16_t_uint32_t(i8* nocapture %ptr, i16 signext %str) {
; CHECK-P10-LABEL: st_align32_int16_t_uint32_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r5, 99999000
-; CHECK-P10-NEXT: stwx r4, r3, r5
+; CHECK-P10-NEXT: pstw r4, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_int16_t_uint32_t:
@@ -4383,8 +4354,7 @@ define dso_local void @st_disjoint_align32_int16_t_uint32_t(i64 %ptr, i16 signex
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r5, -15264
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: pli r5, 999990000
-; CHECK-P10-NEXT: stwx r4, r3, r5
+; CHECK-P10-NEXT: pstw r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_int16_t_uint32_t:
@@ -4546,8 +4516,7 @@ entry:
define dso_local void @st_align32_int16_t_uint64_t(i8* nocapture %ptr, i16 signext %str) {
; CHECK-P10-LABEL: st_align32_int16_t_uint64_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r5, 99999000
-; CHECK-P10-NEXT: stdx r4, r3, r5
+; CHECK-P10-NEXT: pstd r4, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_int16_t_uint64_t:
@@ -4671,8 +4640,7 @@ define dso_local void @st_disjoint_align32_int16_t_uint64_t(i64 %ptr, i16 signex
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r5, -15264
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: pli r5, 999990000
-; CHECK-P10-NEXT: stdx r4, r3, r5
+; CHECK-P10-NEXT: pstd r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_int16_t_uint64_t:
diff --git a/llvm/test/CodeGen/PowerPC/atomics-i32-ldst.ll b/llvm/test/CodeGen/PowerPC/atomics-i32-ldst.ll
index 2b86dd79c9ec8..2774dc389568d 100644
--- a/llvm/test/CodeGen/PowerPC/atomics-i32-ldst.ll
+++ b/llvm/test/CodeGen/PowerPC/atomics-i32-ldst.ll
@@ -50,8 +50,7 @@ entry:
define dso_local signext i32 @ld_align32_int32_t_uint8_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_int32_t_uint8_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 99999000(r3), 0
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
@@ -181,8 +180,7 @@ define dso_local signext i32 @ld_disjoint_align32_int32_t_uint8_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 999990000(r3), 0
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
@@ -356,8 +354,7 @@ entry:
define dso_local signext i32 @ld_align32_int32_t_int8_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_int32_t_int8_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 99999000(r3), 0
; CHECK-P10-NEXT: extsb r3, r3
; CHECK-P10-NEXT: blr
;
@@ -487,8 +484,7 @@ define dso_local signext i32 @ld_disjoint_align32_int32_t_int8_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 999990000(r3), 0
; CHECK-P10-NEXT: extsb r3, r3
; CHECK-P10-NEXT: blr
;
@@ -663,8 +659,7 @@ entry:
define dso_local signext i32 @ld_align32_int32_t_uint16_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_int32_t_uint16_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lhzx r3, r3, r4
+; CHECK-P10-NEXT: plhz r3, 99999000(r3), 0
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
@@ -797,8 +792,7 @@ define dso_local signext i32 @ld_disjoint_align32_int32_t_uint16_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lhzx r3, r3, r4
+; CHECK-P10-NEXT: plhz r3, 999990000(r3), 0
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
@@ -973,8 +967,7 @@ entry:
define dso_local signext i32 @ld_align32_int32_t_int16_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_int32_t_int16_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lhzx r3, r3, r4
+; CHECK-P10-NEXT: plhz r3, 99999000(r3), 0
; CHECK-P10-NEXT: extsh r3, r3
; CHECK-P10-NEXT: blr
;
@@ -1107,8 +1100,7 @@ define dso_local signext i32 @ld_disjoint_align32_int32_t_int16_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lhzx r3, r3, r4
+; CHECK-P10-NEXT: plhz r3, 999990000(r3), 0
; CHECK-P10-NEXT: extsh r3, r3
; CHECK-P10-NEXT: blr
;
@@ -1281,8 +1273,7 @@ entry:
define dso_local signext i32 @ld_align32_int32_t_uint32_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_int32_t_uint32_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lwzx r3, r3, r4
+; CHECK-P10-NEXT: plwz r3, 99999000(r3), 0
; CHECK-P10-NEXT: extsw r3, r3
; CHECK-P10-NEXT: blr
;
@@ -1408,8 +1399,7 @@ define dso_local signext i32 @ld_disjoint_align32_int32_t_uint32_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lwzx r3, r3, r4
+; CHECK-P10-NEXT: plwz r3, 999990000(r3), 0
; CHECK-P10-NEXT: extsw r3, r3
; CHECK-P10-NEXT: blr
;
@@ -1578,8 +1568,7 @@ entry:
define dso_local signext i32 @ld_align32_int32_t_uint64_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_int32_t_uint64_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: ldx r3, r3, r4
+; CHECK-P10-NEXT: pld r3, 99999000(r3), 0
; CHECK-P10-NEXT: extsw r3, r3
; CHECK-P10-NEXT: blr
;
@@ -1712,8 +1701,7 @@ define dso_local signext i32 @ld_disjoint_align32_int32_t_uint64_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: ldx r3, r3, r4
+; CHECK-P10-NEXT: pld r3, 999990000(r3), 0
; CHECK-P10-NEXT: extsw r3, r3
; CHECK-P10-NEXT: blr
;
@@ -1887,8 +1875,7 @@ entry:
define dso_local zeroext i32 @ld_align32_uint32_t_uint8_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_uint32_t_uint8_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 99999000(r3), 0
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
@@ -2018,8 +2005,7 @@ define dso_local zeroext i32 @ld_disjoint_align32_uint32_t_uint8_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 999990000(r3), 0
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
@@ -2195,8 +2181,7 @@ entry:
define dso_local zeroext i32 @ld_align32_uint32_t_int8_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_uint32_t_int8_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 99999000(r3), 0
; CHECK-P10-NEXT: extsb r3, r3
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
@@ -2335,8 +2320,7 @@ define dso_local zeroext i32 @ld_disjoint_align32_uint32_t_int8_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 999990000(r3), 0
; CHECK-P10-NEXT: extsb r3, r3
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
@@ -2522,8 +2506,7 @@ entry:
define dso_local zeroext i32 @ld_align32_uint32_t_uint16_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_uint32_t_uint16_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lhzx r3, r3, r4
+; CHECK-P10-NEXT: plhz r3, 99999000(r3), 0
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
@@ -2656,8 +2639,7 @@ define dso_local zeroext i32 @ld_disjoint_align32_uint32_t_uint16_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lhzx r3, r3, r4
+; CHECK-P10-NEXT: plhz r3, 999990000(r3), 0
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
@@ -2834,8 +2816,7 @@ entry:
define dso_local zeroext i32 @ld_align32_uint32_t_int16_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_uint32_t_int16_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lhzx r3, r3, r4
+; CHECK-P10-NEXT: plhz r3, 99999000(r3), 0
; CHECK-P10-NEXT: extsh r3, r3
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
@@ -2977,8 +2958,7 @@ define dso_local zeroext i32 @ld_disjoint_align32_uint32_t_int16_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lhzx r3, r3, r4
+; CHECK-P10-NEXT: plhz r3, 999990000(r3), 0
; CHECK-P10-NEXT: extsh r3, r3
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
@@ -3162,8 +3142,7 @@ entry:
define dso_local zeroext i32 @ld_align32_uint32_t_uint32_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_uint32_t_uint32_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lwzx r3, r3, r4
+; CHECK-P10-NEXT: plwz r3, 99999000(r3), 0
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
@@ -3289,8 +3268,7 @@ define dso_local zeroext i32 @ld_disjoint_align32_uint32_t_uint32_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lwzx r3, r3, r4
+; CHECK-P10-NEXT: plwz r3, 999990000(r3), 0
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
@@ -3459,8 +3437,7 @@ entry:
define dso_local zeroext i32 @ld_align32_uint32_t_uint64_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_uint32_t_uint64_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: ldx r3, r3, r4
+; CHECK-P10-NEXT: pld r3, 99999000(r3), 0
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
@@ -3593,8 +3570,7 @@ define dso_local zeroext i32 @ld_disjoint_align32_uint32_t_uint64_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: ldx r3, r3, r4
+; CHECK-P10-NEXT: pld r3, 999990000(r3), 0
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
@@ -3766,8 +3742,7 @@ entry:
define dso_local void @st_align32_uint32_t_uint8_t(i8* nocapture %ptr, i32 zeroext %str) {
; CHECK-P10-LABEL: st_align32_uint32_t_uint8_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r5, 99999000
-; CHECK-P10-NEXT: stbx r4, r3, r5
+; CHECK-P10-NEXT: pstb r4, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_uint32_t_uint8_t:
@@ -3888,8 +3863,7 @@ define dso_local void @st_disjoint_align32_uint32_t_uint8_t(i64 %ptr, i32 zeroex
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r5, -15264
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: pli r5, 999990000
-; CHECK-P10-NEXT: stbx r4, r3, r5
+; CHECK-P10-NEXT: pstb r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint32_t_uint8_t:
@@ -4051,8 +4025,7 @@ entry:
define dso_local void @st_align32_uint32_t_uint16_t(i8* nocapture %ptr, i32 zeroext %str) {
; CHECK-P10-LABEL: st_align32_uint32_t_uint16_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r5, 99999000
-; CHECK-P10-NEXT: sthx r4, r3, r5
+; CHECK-P10-NEXT: psth r4, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_uint32_t_uint16_t:
@@ -4176,8 +4149,7 @@ define dso_local void @st_disjoint_align32_uint32_t_uint16_t(i64 %ptr, i32 zeroe
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r5, -15264
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: pli r5, 999990000
-; CHECK-P10-NEXT: sthx r4, r3, r5
+; CHECK-P10-NEXT: psth r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint32_t_uint16_t:
@@ -4337,8 +4309,7 @@ entry:
define dso_local void @st_align32_uint32_t_uint32_t(i8* nocapture %ptr, i32 zeroext %str) {
; CHECK-P10-LABEL: st_align32_uint32_t_uint32_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r5, 99999000
-; CHECK-P10-NEXT: stwx r4, r3, r5
+; CHECK-P10-NEXT: pstw r4, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_uint32_t_uint32_t:
@@ -4455,8 +4426,7 @@ define dso_local void @st_disjoint_align32_uint32_t_uint32_t(i64 %ptr, i32 zeroe
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r5, -15264
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: pli r5, 999990000
-; CHECK-P10-NEXT: stwx r4, r3, r5
+; CHECK-P10-NEXT: pstw r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint32_t_uint32_t:
@@ -4612,8 +4582,7 @@ entry:
define dso_local void @st_align32_uint32_t_uint64_t(i8* nocapture %ptr, i32 zeroext %str) {
; CHECK-P10-LABEL: st_align32_uint32_t_uint64_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r5, 99999000
-; CHECK-P10-NEXT: stdx r4, r3, r5
+; CHECK-P10-NEXT: pstd r4, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_uint32_t_uint64_t:
@@ -4737,8 +4706,7 @@ define dso_local void @st_disjoint_align32_uint32_t_uint64_t(i64 %ptr, i32 zeroe
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r5, -15264
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: pli r5, 999990000
-; CHECK-P10-NEXT: stdx r4, r3, r5
+; CHECK-P10-NEXT: pstd r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint32_t_uint64_t:
@@ -4900,8 +4868,7 @@ entry:
define dso_local void @st_align32_int32_t_uint64_t(i8* nocapture %ptr, i32 signext %str) {
; CHECK-P10-LABEL: st_align32_int32_t_uint64_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r5, 99999000
-; CHECK-P10-NEXT: stdx r4, r3, r5
+; CHECK-P10-NEXT: pstd r4, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_int32_t_uint64_t:
@@ -5025,8 +4992,7 @@ define dso_local void @st_disjoint_align32_int32_t_uint64_t(i64 %ptr, i32 signex
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r5, -15264
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: pli r5, 999990000
-; CHECK-P10-NEXT: stdx r4, r3, r5
+; CHECK-P10-NEXT: pstd r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_int32_t_uint64_t:
diff --git a/llvm/test/CodeGen/PowerPC/atomics-i64-ldst.ll b/llvm/test/CodeGen/PowerPC/atomics-i64-ldst.ll
index a8f505c2973aa..55ba3c0577403 100644
--- a/llvm/test/CodeGen/PowerPC/atomics-i64-ldst.ll
+++ b/llvm/test/CodeGen/PowerPC/atomics-i64-ldst.ll
@@ -50,8 +50,7 @@ entry:
define dso_local i64 @ld_align32_int64_t_uint8_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_int64_t_uint8_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 99999000(r3), 0
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
@@ -181,8 +180,7 @@ define dso_local i64 @ld_disjoint_align32_int64_t_uint8_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 999990000(r3), 0
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
@@ -356,8 +354,7 @@ entry:
define dso_local i64 @ld_align32_int64_t_int8_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_int64_t_int8_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 99999000(r3), 0
; CHECK-P10-NEXT: extsb r3, r3
; CHECK-P10-NEXT: blr
;
@@ -487,8 +484,7 @@ define dso_local i64 @ld_disjoint_align32_int64_t_int8_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 999990000(r3), 0
; CHECK-P10-NEXT: extsb r3, r3
; CHECK-P10-NEXT: blr
;
@@ -663,8 +659,7 @@ entry:
define dso_local i64 @ld_align32_int64_t_uint16_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_int64_t_uint16_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lhzx r3, r3, r4
+; CHECK-P10-NEXT: plhz r3, 99999000(r3), 0
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
@@ -797,8 +792,7 @@ define dso_local i64 @ld_disjoint_align32_int64_t_uint16_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lhzx r3, r3, r4
+; CHECK-P10-NEXT: plhz r3, 999990000(r3), 0
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
@@ -973,8 +967,7 @@ entry:
define dso_local i64 @ld_align32_int64_t_int16_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_int64_t_int16_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lhzx r3, r3, r4
+; CHECK-P10-NEXT: plhz r3, 99999000(r3), 0
; CHECK-P10-NEXT: extsh r3, r3
; CHECK-P10-NEXT: blr
;
@@ -1107,8 +1100,7 @@ define dso_local i64 @ld_disjoint_align32_int64_t_int16_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lhzx r3, r3, r4
+; CHECK-P10-NEXT: plhz r3, 999990000(r3), 0
; CHECK-P10-NEXT: extsh r3, r3
; CHECK-P10-NEXT: blr
;
@@ -1283,8 +1275,7 @@ entry:
define dso_local i64 @ld_align32_int64_t_uint32_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_int64_t_uint32_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lwzx r3, r3, r4
+; CHECK-P10-NEXT: plwz r3, 99999000(r3), 0
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
@@ -1417,8 +1408,7 @@ define dso_local i64 @ld_disjoint_align32_int64_t_uint32_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lwzx r3, r3, r4
+; CHECK-P10-NEXT: plwz r3, 999990000(r3), 0
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
@@ -1593,8 +1583,7 @@ entry:
define dso_local i64 @ld_align32_int64_t_int32_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_int64_t_int32_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lwzx r3, r3, r4
+; CHECK-P10-NEXT: plwz r3, 99999000(r3), 0
; CHECK-P10-NEXT: extsw r3, r3
; CHECK-P10-NEXT: blr
;
@@ -1727,8 +1716,7 @@ define dso_local i64 @ld_disjoint_align32_int64_t_int32_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lwzx r3, r3, r4
+; CHECK-P10-NEXT: plwz r3, 999990000(r3), 0
; CHECK-P10-NEXT: extsw r3, r3
; CHECK-P10-NEXT: blr
;
@@ -1899,8 +1887,7 @@ entry:
define dso_local i64 @ld_align32_int64_t_uint64_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_int64_t_uint64_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: ldx r3, r3, r4
+; CHECK-P10-NEXT: pld r3, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align32_int64_t_uint64_t:
@@ -2017,8 +2004,7 @@ define dso_local i64 @ld_disjoint_align32_int64_t_uint64_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: ldx r3, r3, r4
+; CHECK-P10-NEXT: pld r3, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_int64_t_uint64_t:
@@ -2175,8 +2161,7 @@ entry:
define dso_local i64 @ld_align32_uint64_t_uint8_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_uint64_t_uint8_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 99999000(r3), 0
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
@@ -2306,8 +2291,7 @@ define dso_local i64 @ld_disjoint_align32_uint64_t_uint8_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 999990000(r3), 0
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
@@ -2481,8 +2465,7 @@ entry:
define dso_local i64 @ld_align32_uint64_t_int8_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_uint64_t_int8_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 99999000(r3), 0
; CHECK-P10-NEXT: extsb r3, r3
; CHECK-P10-NEXT: blr
;
@@ -2612,8 +2595,7 @@ define dso_local i64 @ld_disjoint_align32_uint64_t_int8_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 999990000(r3), 0
; CHECK-P10-NEXT: extsb r3, r3
; CHECK-P10-NEXT: blr
;
@@ -2788,8 +2770,7 @@ entry:
define dso_local i64 @ld_align32_uint64_t_uint16_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_uint64_t_uint16_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lhzx r3, r3, r4
+; CHECK-P10-NEXT: plhz r3, 99999000(r3), 0
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
@@ -2922,8 +2903,7 @@ define dso_local i64 @ld_disjoint_align32_uint64_t_uint16_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lhzx r3, r3, r4
+; CHECK-P10-NEXT: plhz r3, 999990000(r3), 0
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
@@ -3098,8 +3078,7 @@ entry:
define dso_local i64 @ld_align32_uint64_t_int16_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_uint64_t_int16_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lhzx r3, r3, r4
+; CHECK-P10-NEXT: plhz r3, 99999000(r3), 0
; CHECK-P10-NEXT: extsh r3, r3
; CHECK-P10-NEXT: blr
;
@@ -3232,8 +3211,7 @@ define dso_local i64 @ld_disjoint_align32_uint64_t_int16_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lhzx r3, r3, r4
+; CHECK-P10-NEXT: plhz r3, 999990000(r3), 0
; CHECK-P10-NEXT: extsh r3, r3
; CHECK-P10-NEXT: blr
;
@@ -3408,8 +3386,7 @@ entry:
define dso_local i64 @ld_align32_uint64_t_uint32_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_uint64_t_uint32_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lwzx r3, r3, r4
+; CHECK-P10-NEXT: plwz r3, 99999000(r3), 0
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
@@ -3542,8 +3519,7 @@ define dso_local i64 @ld_disjoint_align32_uint64_t_uint32_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lwzx r3, r3, r4
+; CHECK-P10-NEXT: plwz r3, 999990000(r3), 0
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
@@ -3718,8 +3694,7 @@ entry:
define dso_local i64 @ld_align32_uint64_t_int32_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_uint64_t_int32_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lwzx r3, r3, r4
+; CHECK-P10-NEXT: plwz r3, 99999000(r3), 0
; CHECK-P10-NEXT: extsw r3, r3
; CHECK-P10-NEXT: blr
;
@@ -3852,8 +3827,7 @@ define dso_local i64 @ld_disjoint_align32_uint64_t_int32_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lwzx r3, r3, r4
+; CHECK-P10-NEXT: plwz r3, 999990000(r3), 0
; CHECK-P10-NEXT: extsw r3, r3
; CHECK-P10-NEXT: blr
;
@@ -4024,8 +3998,7 @@ entry:
define dso_local i64 @ld_align32_uint64_t_uint64_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_uint64_t_uint64_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: ldx r3, r3, r4
+; CHECK-P10-NEXT: pld r3, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align32_uint64_t_uint64_t:
@@ -4142,8 +4115,7 @@ define dso_local i64 @ld_disjoint_align32_uint64_t_uint64_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: ldx r3, r3, r4
+; CHECK-P10-NEXT: pld r3, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_uint64_t_uint64_t:
@@ -4298,8 +4270,7 @@ entry:
define dso_local void @st_align32_uint64_t_uint8_t(i8* nocapture %ptr, i64 %str) {
; CHECK-P10-LABEL: st_align32_uint64_t_uint8_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r5, 99999000
-; CHECK-P10-NEXT: stbx r4, r3, r5
+; CHECK-P10-NEXT: pstb r4, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_uint64_t_uint8_t:
@@ -4420,8 +4391,7 @@ define dso_local void @st_disjoint_align32_uint64_t_uint8_t(i64 %ptr, i64 %str)
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r5, -15264
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: pli r5, 999990000
-; CHECK-P10-NEXT: stbx r4, r3, r5
+; CHECK-P10-NEXT: pstb r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint64_t_uint8_t:
@@ -4583,8 +4553,7 @@ entry:
define dso_local void @st_align32_uint64_t_uint16_t(i8* nocapture %ptr, i64 %str) {
; CHECK-P10-LABEL: st_align32_uint64_t_uint16_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r5, 99999000
-; CHECK-P10-NEXT: sthx r4, r3, r5
+; CHECK-P10-NEXT: psth r4, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_uint64_t_uint16_t:
@@ -4708,8 +4677,7 @@ define dso_local void @st_disjoint_align32_uint64_t_uint16_t(i64 %ptr, i64 %str)
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r5, -15264
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: pli r5, 999990000
-; CHECK-P10-NEXT: sthx r4, r3, r5
+; CHECK-P10-NEXT: psth r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint64_t_uint16_t:
@@ -4871,8 +4839,7 @@ entry:
define dso_local void @st_align32_uint64_t_uint32_t(i8* nocapture %ptr, i64 %str) {
; CHECK-P10-LABEL: st_align32_uint64_t_uint32_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r5, 99999000
-; CHECK-P10-NEXT: stwx r4, r3, r5
+; CHECK-P10-NEXT: pstw r4, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_uint64_t_uint32_t:
@@ -4996,8 +4963,7 @@ define dso_local void @st_disjoint_align32_uint64_t_uint32_t(i64 %ptr, i64 %str)
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r5, -15264
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: pli r5, 999990000
-; CHECK-P10-NEXT: stwx r4, r3, r5
+; CHECK-P10-NEXT: pstw r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint64_t_uint32_t:
@@ -5157,8 +5123,7 @@ entry:
define dso_local void @st_align32_uint64_t_uint64_t(i8* nocapture %ptr, i64 %str) {
; CHECK-P10-LABEL: st_align32_uint64_t_uint64_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r5, 99999000
-; CHECK-P10-NEXT: stdx r4, r3, r5
+; CHECK-P10-NEXT: pstd r4, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_uint64_t_uint64_t:
@@ -5275,8 +5240,7 @@ define dso_local void @st_disjoint_align32_uint64_t_uint64_t(i64 %ptr, i64 %str)
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r5, -15264
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: pli r5, 999990000
-; CHECK-P10-NEXT: stdx r4, r3, r5
+; CHECK-P10-NEXT: pstd r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint64_t_uint64_t:
diff --git a/llvm/test/CodeGen/PowerPC/atomics-i8-ldst.ll b/llvm/test/CodeGen/PowerPC/atomics-i8-ldst.ll
index ad13b5b5211fb..d04487af90ff6 100644
--- a/llvm/test/CodeGen/PowerPC/atomics-i8-ldst.ll
+++ b/llvm/test/CodeGen/PowerPC/atomics-i8-ldst.ll
@@ -48,8 +48,7 @@ entry:
define dso_local signext i8 @ld_align32_int8_t_uint8_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_int8_t_uint8_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 99999000(r3), 0
; CHECK-P10-NEXT: extsb r3, r3
; CHECK-P10-NEXT: blr
;
@@ -172,8 +171,7 @@ define dso_local signext i8 @ld_disjoint_align32_int8_t_uint8_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 999990000(r3), 0
; CHECK-P10-NEXT: extsb r3, r3
; CHECK-P10-NEXT: blr
;
@@ -342,8 +340,7 @@ entry:
define dso_local signext i8 @ld_align32_int8_t_uint16_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_int8_t_uint16_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lhzx r3, r3, r4
+; CHECK-P10-NEXT: plhz r3, 99999000(r3), 0
; CHECK-P10-NEXT: extsb r3, r3
; CHECK-P10-NEXT: blr
;
@@ -476,8 +473,7 @@ define dso_local signext i8 @ld_disjoint_align32_int8_t_uint16_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lhzx r3, r3, r4
+; CHECK-P10-NEXT: plhz r3, 999990000(r3), 0
; CHECK-P10-NEXT: extsb r3, r3
; CHECK-P10-NEXT: blr
;
@@ -652,8 +648,7 @@ entry:
define dso_local signext i8 @ld_align32_int8_t_uint32_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_int8_t_uint32_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lwzx r3, r3, r4
+; CHECK-P10-NEXT: plwz r3, 99999000(r3), 0
; CHECK-P10-NEXT: extsb r3, r3
; CHECK-P10-NEXT: blr
;
@@ -786,8 +781,7 @@ define dso_local signext i8 @ld_disjoint_align32_int8_t_uint32_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lwzx r3, r3, r4
+; CHECK-P10-NEXT: plwz r3, 999990000(r3), 0
; CHECK-P10-NEXT: extsb r3, r3
; CHECK-P10-NEXT: blr
;
@@ -962,8 +956,7 @@ entry:
define dso_local signext i8 @ld_align32_int8_t_uint64_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_int8_t_uint64_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: ldx r3, r3, r4
+; CHECK-P10-NEXT: pld r3, 99999000(r3), 0
; CHECK-P10-NEXT: extsb r3, r3
; CHECK-P10-NEXT: blr
;
@@ -1096,8 +1089,7 @@ define dso_local signext i8 @ld_disjoint_align32_int8_t_uint64_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: ldx r3, r3, r4
+; CHECK-P10-NEXT: pld r3, 999990000(r3), 0
; CHECK-P10-NEXT: extsb r3, r3
; CHECK-P10-NEXT: blr
;
@@ -1269,8 +1261,7 @@ entry:
define dso_local zeroext i8 @ld_align32_uint8_t_uint8_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_uint8_t_uint8_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 99999000(r3), 0
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
@@ -1393,8 +1384,7 @@ define dso_local zeroext i8 @ld_disjoint_align32_uint8_t_uint8_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 999990000(r3), 0
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
@@ -1563,8 +1553,7 @@ entry:
define dso_local zeroext i8 @ld_align32_uint8_t_uint16_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_uint8_t_uint16_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lhzx r3, r3, r4
+; CHECK-P10-NEXT: plhz r3, 99999000(r3), 0
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
@@ -1697,8 +1686,7 @@ define dso_local zeroext i8 @ld_disjoint_align32_uint8_t_uint16_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lhzx r3, r3, r4
+; CHECK-P10-NEXT: plhz r3, 999990000(r3), 0
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
@@ -1873,8 +1861,7 @@ entry:
define dso_local zeroext i8 @ld_align32_uint8_t_uint32_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_uint8_t_uint32_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lwzx r3, r3, r4
+; CHECK-P10-NEXT: plwz r3, 99999000(r3), 0
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
@@ -2007,8 +1994,7 @@ define dso_local zeroext i8 @ld_disjoint_align32_uint8_t_uint32_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lwzx r3, r3, r4
+; CHECK-P10-NEXT: plwz r3, 999990000(r3), 0
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
@@ -2183,8 +2169,7 @@ entry:
define dso_local zeroext i8 @ld_align32_uint8_t_uint64_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_uint8_t_uint64_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: ldx r3, r3, r4
+; CHECK-P10-NEXT: pld r3, 99999000(r3), 0
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
@@ -2317,8 +2302,7 @@ define dso_local zeroext i8 @ld_disjoint_align32_uint8_t_uint64_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: ldx r3, r3, r4
+; CHECK-P10-NEXT: pld r3, 999990000(r3), 0
; CHECK-P10-NEXT: clrldi r3, r3, 56
; CHECK-P10-NEXT: blr
;
@@ -2488,8 +2472,7 @@ entry:
define dso_local void @st_align32_uint8_t_uint8_t(i8* nocapture %ptr, i8 zeroext %str) {
; CHECK-P10-LABEL: st_align32_uint8_t_uint8_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r5, 99999000
-; CHECK-P10-NEXT: stbx r4, r3, r5
+; CHECK-P10-NEXT: pstb r4, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_uint8_t_uint8_t:
@@ -2603,8 +2586,7 @@ define dso_local void @st_disjoint_align32_uint8_t_uint8_t(i64 %ptr, i8 zeroext
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r5, -15264
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: pli r5, 999990000
-; CHECK-P10-NEXT: stbx r4, r3, r5
+; CHECK-P10-NEXT: pstb r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint8_t_uint8_t:
@@ -2760,8 +2742,7 @@ entry:
define dso_local void @st_align32_uint8_t_uint16_t(i8* nocapture %ptr, i8 zeroext %str) {
; CHECK-P10-LABEL: st_align32_uint8_t_uint16_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r5, 99999000
-; CHECK-P10-NEXT: sthx r4, r3, r5
+; CHECK-P10-NEXT: psth r4, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_uint8_t_uint16_t:
@@ -2885,8 +2866,7 @@ define dso_local void @st_disjoint_align32_uint8_t_uint16_t(i64 %ptr, i8 zeroext
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r5, -15264
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: pli r5, 999990000
-; CHECK-P10-NEXT: sthx r4, r3, r5
+; CHECK-P10-NEXT: psth r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint8_t_uint16_t:
@@ -3048,8 +3028,7 @@ entry:
define dso_local void @st_align32_uint8_t_uint32_t(i8* nocapture %ptr, i8 zeroext %str) {
; CHECK-P10-LABEL: st_align32_uint8_t_uint32_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r5, 99999000
-; CHECK-P10-NEXT: stwx r4, r3, r5
+; CHECK-P10-NEXT: pstw r4, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_uint8_t_uint32_t:
@@ -3173,8 +3152,7 @@ define dso_local void @st_disjoint_align32_uint8_t_uint32_t(i64 %ptr, i8 zeroext
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r5, -15264
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: pli r5, 999990000
-; CHECK-P10-NEXT: stwx r4, r3, r5
+; CHECK-P10-NEXT: pstw r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint8_t_uint32_t:
@@ -3336,8 +3314,7 @@ entry:
define dso_local void @st_align32_uint8_t_uint64_t(i8* nocapture %ptr, i8 zeroext %str) {
; CHECK-P10-LABEL: st_align32_uint8_t_uint64_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r5, 99999000
-; CHECK-P10-NEXT: stdx r4, r3, r5
+; CHECK-P10-NEXT: pstd r4, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_uint8_t_uint64_t:
@@ -3461,8 +3438,7 @@ define dso_local void @st_disjoint_align32_uint8_t_uint64_t(i64 %ptr, i8 zeroext
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r5, -15264
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: pli r5, 999990000
-; CHECK-P10-NEXT: stdx r4, r3, r5
+; CHECK-P10-NEXT: pstd r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint8_t_uint64_t:
@@ -3624,8 +3600,7 @@ entry:
define dso_local void @st_align32_int8_t_uint16_t(i8* nocapture %ptr, i8 signext %str) {
; CHECK-P10-LABEL: st_align32_int8_t_uint16_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r5, 99999000
-; CHECK-P10-NEXT: sthx r4, r3, r5
+; CHECK-P10-NEXT: psth r4, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_int8_t_uint16_t:
@@ -3749,8 +3724,7 @@ define dso_local void @st_disjoint_align32_int8_t_uint16_t(i64 %ptr, i8 signext
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r5, -15264
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: pli r5, 999990000
-; CHECK-P10-NEXT: sthx r4, r3, r5
+; CHECK-P10-NEXT: psth r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_int8_t_uint16_t:
@@ -3912,8 +3886,7 @@ entry:
define dso_local void @st_align32_int8_t_uint32_t(i8* nocapture %ptr, i8 signext %str) {
; CHECK-P10-LABEL: st_align32_int8_t_uint32_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r5, 99999000
-; CHECK-P10-NEXT: stwx r4, r3, r5
+; CHECK-P10-NEXT: pstw r4, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_int8_t_uint32_t:
@@ -4037,8 +4010,7 @@ define dso_local void @st_disjoint_align32_int8_t_uint32_t(i64 %ptr, i8 signext
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r5, -15264
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: pli r5, 999990000
-; CHECK-P10-NEXT: stwx r4, r3, r5
+; CHECK-P10-NEXT: pstw r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_int8_t_uint32_t:
@@ -4200,8 +4172,7 @@ entry:
define dso_local void @st_align32_int8_t_uint64_t(i8* nocapture %ptr, i8 signext %str) {
; CHECK-P10-LABEL: st_align32_int8_t_uint64_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r5, 99999000
-; CHECK-P10-NEXT: stdx r4, r3, r5
+; CHECK-P10-NEXT: pstd r4, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_int8_t_uint64_t:
@@ -4325,8 +4296,7 @@ define dso_local void @st_disjoint_align32_int8_t_uint64_t(i64 %ptr, i8 signext
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r5, -15264
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: pli r5, 999990000
-; CHECK-P10-NEXT: stdx r4, r3, r5
+; CHECK-P10-NEXT: pstd r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_int8_t_uint64_t:
diff --git a/llvm/test/CodeGen/PowerPC/f128_ldst.ll b/llvm/test/CodeGen/PowerPC/f128_ldst.ll
index acea5a40bcfd3..520ab9529ec13 100644
--- a/llvm/test/CodeGen/PowerPC/f128_ldst.ll
+++ b/llvm/test/CodeGen/PowerPC/f128_ldst.ll
@@ -29,11 +29,16 @@ entry:
; Function Attrs: norecurse nounwind readonly willreturn
define dso_local fp128 @ld_unalign16___float128___float128(i8* nocapture readonly %ptr) {
-; CHECK-LABEL: ld_unalign16___float128___float128:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: li r4, 1
-; CHECK-NEXT: lxvx v2, r3, r4
-; CHECK-NEXT: blr
+; CHECK-P10-LABEL: ld_unalign16___float128___float128:
+; CHECK-P10: # %bb.0: # %entry
+; CHECK-P10-NEXT: plxv v2, 1(r3), 0
+; CHECK-P10-NEXT: blr
+;
+; CHECK-PREP10-LABEL: ld_unalign16___float128___float128:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 1
+; CHECK-PREP10-NEXT: lxvx v2, r3, r4
+; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1
%0 = bitcast i8* %add.ptr to fp128*
@@ -43,11 +48,16 @@ entry:
; Function Attrs: norecurse nounwind readonly willreturn
define dso_local fp128 @ld_align16___float128___float128(i8* nocapture readonly %ptr) {
-; CHECK-LABEL: ld_align16___float128___float128:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: li r4, 8
-; CHECK-NEXT: lxvx v2, r3, r4
-; CHECK-NEXT: blr
+; CHECK-P10-LABEL: ld_align16___float128___float128:
+; CHECK-P10: # %bb.0: # %entry
+; CHECK-P10-NEXT: plxv v2, 8(r3), 0
+; CHECK-P10-NEXT: blr
+;
+; CHECK-PREP10-LABEL: ld_align16___float128___float128:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 8
+; CHECK-PREP10-NEXT: lxvx v2, r3, r4
+; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 8
%0 = bitcast i8* %add.ptr to fp128*
@@ -59,8 +69,7 @@ entry:
define dso_local fp128 @ld_unalign32___float128___float128(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_unalign32___float128___float128:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999
-; CHECK-P10-NEXT: lxvx v2, r3, r4
+; CHECK-P10-NEXT: plxv v2, 99999(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_unalign32___float128___float128:
@@ -80,8 +89,7 @@ entry:
define dso_local fp128 @ld_align32___float128___float128(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32___float128___float128:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lxvx v2, r3, r4
+; CHECK-P10-NEXT: plxv v2, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align32___float128___float128:
@@ -205,12 +213,18 @@ entry:
; Function Attrs: norecurse nounwind readonly willreturn
define dso_local fp128 @ld_disjoint_unalign16___float128___float128(i64 %ptr) {
-; CHECK-LABEL: ld_disjoint_unalign16___float128___float128:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: rldicr r3, r3, 0, 51
-; CHECK-NEXT: li r4, 6
-; CHECK-NEXT: lxvx v2, r3, r4
-; CHECK-NEXT: blr
+; CHECK-P10-LABEL: ld_disjoint_unalign16___float128___float128:
+; CHECK-P10: # %bb.0: # %entry
+; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
+; CHECK-P10-NEXT: plxv v2, 6(r3), 0
+; CHECK-P10-NEXT: blr
+;
+; CHECK-PREP10-LABEL: ld_disjoint_unalign16___float128___float128:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: rldicr r3, r3, 0, 51
+; CHECK-PREP10-NEXT: li r4, 6
+; CHECK-PREP10-NEXT: lxvx v2, r3, r4
+; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 6
@@ -221,12 +235,18 @@ entry:
; Function Attrs: norecurse nounwind readonly willreturn
define dso_local fp128 @ld_disjoint_align16___float128___float128(i64 %ptr) {
-; CHECK-LABEL: ld_disjoint_align16___float128___float128:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: rldicr r3, r3, 0, 51
-; CHECK-NEXT: li r4, 24
-; CHECK-NEXT: lxvx v2, r3, r4
-; CHECK-NEXT: blr
+; CHECK-P10-LABEL: ld_disjoint_align16___float128___float128:
+; CHECK-P10: # %bb.0: # %entry
+; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
+; CHECK-P10-NEXT: plxv v2, 24(r3), 0
+; CHECK-P10-NEXT: blr
+;
+; CHECK-PREP10-LABEL: ld_disjoint_align16___float128___float128:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: rldicr r3, r3, 0, 51
+; CHECK-PREP10-NEXT: li r4, 24
+; CHECK-PREP10-NEXT: lxvx v2, r3, r4
+; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
@@ -255,8 +275,7 @@ define dso_local fp128 @ld_disjoint_unalign32___float128___float128(i64 %ptr) {
; CHECK-P10-LABEL: ld_disjoint_unalign32___float128___float128:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: rldicr r3, r3, 0, 43
-; CHECK-P10-NEXT: pli r4, 99999
-; CHECK-P10-NEXT: lxvx v2, r3, r4
+; CHECK-P10-NEXT: plxv v2, 99999(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_disjoint_unalign32___float128___float128:
@@ -280,8 +299,7 @@ define dso_local fp128 @ld_disjoint_align32___float128___float128(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lxvx v2, r3, r4
+; CHECK-P10-NEXT: plxv v2, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_disjoint_align32___float128___float128:
@@ -500,11 +518,16 @@ entry:
; Function Attrs: nofree norecurse nounwind willreturn writeonly
define dso_local void @st_unalign16___float128___float128(i8* nocapture %ptr, fp128 %str) {
-; CHECK-LABEL: st_unalign16___float128___float128:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: li r4, 1
-; CHECK-NEXT: stxvx v2, r3, r4
-; CHECK-NEXT: blr
+; CHECK-P10-LABEL: st_unalign16___float128___float128:
+; CHECK-P10: # %bb.0: # %entry
+; CHECK-P10-NEXT: pstxv v2, 1(r3), 0
+; CHECK-P10-NEXT: blr
+;
+; CHECK-PREP10-LABEL: st_unalign16___float128___float128:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 1
+; CHECK-PREP10-NEXT: stxvx v2, r3, r4
+; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1
%0 = bitcast i8* %add.ptr to fp128*
@@ -514,11 +537,16 @@ entry:
; Function Attrs: nofree norecurse nounwind willreturn writeonly
define dso_local void @st_align16___float128___float128(i8* nocapture %ptr, fp128 %str) {
-; CHECK-LABEL: st_align16___float128___float128:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: li r4, 8
-; CHECK-NEXT: stxvx v2, r3, r4
-; CHECK-NEXT: blr
+; CHECK-P10-LABEL: st_align16___float128___float128:
+; CHECK-P10: # %bb.0: # %entry
+; CHECK-P10-NEXT: pstxv v2, 8(r3), 0
+; CHECK-P10-NEXT: blr
+;
+; CHECK-PREP10-LABEL: st_align16___float128___float128:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 8
+; CHECK-PREP10-NEXT: stxvx v2, r3, r4
+; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 8
%0 = bitcast i8* %add.ptr to fp128*
@@ -530,8 +558,7 @@ entry:
define dso_local void @st_unalign32___float128___float128(i8* nocapture %ptr, fp128 %str) {
; CHECK-P10-LABEL: st_unalign32___float128___float128:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999
-; CHECK-P10-NEXT: stxvx v2, r3, r4
+; CHECK-P10-NEXT: pstxv v2, 99999(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_unalign32___float128___float128:
@@ -551,8 +578,7 @@ entry:
define dso_local void @st_align32___float128___float128(i8* nocapture %ptr, fp128 %str) {
; CHECK-P10-LABEL: st_align32___float128___float128:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: stxvx v2, r3, r4
+; CHECK-P10-NEXT: pstxv v2, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32___float128___float128:
@@ -676,12 +702,18 @@ entry:
; Function Attrs: nofree norecurse nounwind willreturn writeonly
define dso_local void @st_disjoint_unalign16___float128___float128(i64 %ptr, fp128 %str) {
-; CHECK-LABEL: st_disjoint_unalign16___float128___float128:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: rldicr r3, r3, 0, 51
-; CHECK-NEXT: li r4, 6
-; CHECK-NEXT: stxvx v2, r3, r4
-; CHECK-NEXT: blr
+; CHECK-P10-LABEL: st_disjoint_unalign16___float128___float128:
+; CHECK-P10: # %bb.0: # %entry
+; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
+; CHECK-P10-NEXT: pstxv v2, 6(r3), 0
+; CHECK-P10-NEXT: blr
+;
+; CHECK-PREP10-LABEL: st_disjoint_unalign16___float128___float128:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: rldicr r3, r3, 0, 51
+; CHECK-PREP10-NEXT: li r4, 6
+; CHECK-PREP10-NEXT: stxvx v2, r3, r4
+; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 6
@@ -692,12 +724,18 @@ entry:
; Function Attrs: nofree norecurse nounwind willreturn writeonly
define dso_local void @st_disjoint_align16___float128___float128(i64 %ptr, fp128 %str) {
-; CHECK-LABEL: st_disjoint_align16___float128___float128:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: rldicr r3, r3, 0, 51
-; CHECK-NEXT: li r4, 24
-; CHECK-NEXT: stxvx v2, r3, r4
-; CHECK-NEXT: blr
+; CHECK-P10-LABEL: st_disjoint_align16___float128___float128:
+; CHECK-P10: # %bb.0: # %entry
+; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
+; CHECK-P10-NEXT: pstxv v2, 24(r3), 0
+; CHECK-P10-NEXT: blr
+;
+; CHECK-PREP10-LABEL: st_disjoint_align16___float128___float128:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: rldicr r3, r3, 0, 51
+; CHECK-PREP10-NEXT: li r4, 24
+; CHECK-PREP10-NEXT: stxvx v2, r3, r4
+; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 24
@@ -726,8 +764,7 @@ define dso_local void @st_disjoint_unalign32___float128___float128(i64 %ptr, fp1
; CHECK-P10-LABEL: st_disjoint_unalign32___float128___float128:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: rldicr r3, r3, 0, 43
-; CHECK-P10-NEXT: pli r4, 99999
-; CHECK-P10-NEXT: stxvx v2, r3, r4
+; CHECK-P10-NEXT: pstxv v2, 99999(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_disjoint_unalign32___float128___float128:
@@ -751,8 +788,7 @@ define dso_local void @st_disjoint_align32___float128___float128(i64 %ptr, fp128
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: stxvx v2, r3, r4
+; CHECK-P10-NEXT: pstxv v2, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_disjoint_align32___float128___float128:
@@ -1001,12 +1037,11 @@ define dso_local void @testGlob128PtrPlus3() {
; CHECK-P10-BE-LABEL: testGlob128PtrPlus3:
; CHECK-P10-BE: # %bb.0: # %entry
; CHECK-P10-BE-NEXT: addis r3, r2, GlobLd128 at toc@ha
-; CHECK-P10-BE-NEXT: li r4, 3
; CHECK-P10-BE-NEXT: addi r3, r3, GlobLd128 at toc@l
-; CHECK-P10-BE-NEXT: lxvx vs0, r3, r4
+; CHECK-P10-BE-NEXT: plxv vs0, 3(r3), 0
; CHECK-P10-BE-NEXT: addis r3, r2, GlobSt128 at toc@ha
; CHECK-P10-BE-NEXT: addi r3, r3, GlobSt128 at toc@l
-; CHECK-P10-BE-NEXT: stxvx vs0, r3, r4
+; CHECK-P10-BE-NEXT: pstxv vs0, 3(r3), 0
; CHECK-P10-BE-NEXT: blr
;
; CHECK-PREP10-LABEL: testGlob128PtrPlus3:
@@ -1036,12 +1071,11 @@ define dso_local void @testGlob128PtrPlus4() {
; CHECK-P10-BE-LABEL: testGlob128PtrPlus4:
; CHECK-P10-BE: # %bb.0: # %entry
; CHECK-P10-BE-NEXT: addis r3, r2, GlobLd128 at toc@ha
-; CHECK-P10-BE-NEXT: li r4, 4
; CHECK-P10-BE-NEXT: addi r3, r3, GlobLd128 at toc@l
-; CHECK-P10-BE-NEXT: lxvx vs0, r3, r4
+; CHECK-P10-BE-NEXT: plxv vs0, 4(r3), 0
; CHECK-P10-BE-NEXT: addis r3, r2, GlobSt128 at toc@ha
; CHECK-P10-BE-NEXT: addi r3, r3, GlobSt128 at toc@l
-; CHECK-P10-BE-NEXT: stxvx vs0, r3, r4
+; CHECK-P10-BE-NEXT: pstxv vs0, 4(r3), 0
; CHECK-P10-BE-NEXT: blr
;
; CHECK-PREP10-LABEL: testGlob128PtrPlus4:
diff --git a/llvm/test/CodeGen/PowerPC/int128_ldst.ll b/llvm/test/CodeGen/PowerPC/int128_ldst.ll
index cfc41627e7970..619857cb86481 100644
--- a/llvm/test/CodeGen/PowerPC/int128_ldst.ll
+++ b/llvm/test/CodeGen/PowerPC/int128_ldst.ll
@@ -36,10 +36,8 @@ entry:
define dso_local i128 @ld_unalign16___int128___int128(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_unalign16___int128___int128:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: li r4, 1
-; CHECK-P10-NEXT: ldx r5, r3, r4
-; CHECK-P10-NEXT: li r4, 9
-; CHECK-P10-NEXT: ldx r4, r3, r4
+; CHECK-P10-NEXT: pld r5, 1(r3), 0
+; CHECK-P10-NEXT: pld r4, 9(r3), 0
; CHECK-P10-NEXT: mr r3, r5
; CHECK-P10-NEXT: blr
;
@@ -258,10 +256,8 @@ define dso_local i128 @ld_disjoint_unalign16___int128___int128(i64 %ptr) {
; CHECK-P10-LABEL: ld_disjoint_unalign16___int128___int128:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: rldicr r4, r3, 0, 51
-; CHECK-P10-NEXT: li r3, 6
-; CHECK-P10-NEXT: li r5, 14
-; CHECK-P10-NEXT: ldx r3, r4, r3
-; CHECK-P10-NEXT: ldx r4, r4, r5
+; CHECK-P10-NEXT: pld r3, 6(r4), 0
+; CHECK-P10-NEXT: pld r4, 14(r4), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_unalign16___int128___int128:
@@ -326,10 +322,8 @@ define dso_local i128 @ld_disjoint_unalign32___int128___int128(i64 %ptr) {
; CHECK-P10-LABEL: ld_disjoint_unalign32___int128___int128:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: rldicr r4, r3, 0, 43
-; CHECK-P10-NEXT: pli r3, 99999
-; CHECK-P10-NEXT: pli r5, 100007
-; CHECK-P10-NEXT: ldx r3, r4, r3
-; CHECK-P10-NEXT: ldx r4, r4, r5
+; CHECK-P10-NEXT: pld r3, 99999(r4), 0
+; CHECK-P10-NEXT: pld r4, 100007(r4), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_unalign32___int128___int128:
@@ -364,11 +358,9 @@ define dso_local i128 @ld_disjoint_align32___int128___int128(i64 %ptr) {
; CHECK-P10-LABEL: ld_disjoint_align32___int128___int128:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
-; CHECK-P10-NEXT: pli r5, 999990008
; CHECK-P10-NEXT: and r4, r3, r4
-; CHECK-P10-NEXT: pli r3, 999990000
-; CHECK-P10-NEXT: ldx r3, r4, r3
-; CHECK-P10-NEXT: ldx r4, r4, r5
+; CHECK-P10-NEXT: pld r3, 999990000(r4), 0
+; CHECK-P10-NEXT: pld r4, 999990008(r4), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_disjoint_align32___int128___int128:
@@ -682,10 +674,8 @@ entry:
define dso_local void @st_unalign16__int128___int128(i8* nocapture %ptr, i128 %str) {
; CHECK-P10-LABEL: st_unalign16__int128___int128:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: li r6, 9
-; CHECK-P10-NEXT: stdx r5, r3, r6
-; CHECK-P10-NEXT: li r5, 1
-; CHECK-P10-NEXT: stdx r4, r3, r5
+; CHECK-P10-NEXT: pstd r5, 9(r3), 0
+; CHECK-P10-NEXT: pstd r4, 1(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_unalign16__int128___int128:
@@ -891,10 +881,8 @@ define dso_local void @st_disjoint_unalign16__int128___int128(i64 %ptr, i128 %st
; CHECK-P10-LABEL: st_disjoint_unalign16__int128___int128:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: li r6, 14
-; CHECK-P10-NEXT: stdx r5, r3, r6
-; CHECK-P10-NEXT: li r5, 6
-; CHECK-P10-NEXT: stdx r4, r3, r5
+; CHECK-P10-NEXT: pstd r5, 14(r3), 0
+; CHECK-P10-NEXT: pstd r4, 6(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_unalign16__int128___int128:
@@ -959,10 +947,8 @@ define dso_local void @st_disjoint_unalign32__int128___int128(i64 %ptr, i128 %st
; CHECK-P10-LABEL: st_disjoint_unalign32__int128___int128:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: rldicr r3, r3, 0, 43
-; CHECK-P10-NEXT: pli r6, 100007
-; CHECK-P10-NEXT: stdx r5, r3, r6
-; CHECK-P10-NEXT: pli r5, 99999
-; CHECK-P10-NEXT: stdx r4, r3, r5
+; CHECK-P10-NEXT: pstd r5, 100007(r3), 0
+; CHECK-P10-NEXT: pstd r4, 99999(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_unalign32__int128___int128:
@@ -998,10 +984,8 @@ define dso_local void @st_disjoint_align32__int128___int128(i64 %ptr, i128 %str)
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r6, -15264
; CHECK-P10-NEXT: and r3, r3, r6
-; CHECK-P10-NEXT: pli r6, 999990008
-; CHECK-P10-NEXT: stdx r5, r3, r6
-; CHECK-P10-NEXT: pli r5, 999990000
-; CHECK-P10-NEXT: stdx r4, r3, r5
+; CHECK-P10-NEXT: pstd r5, 999990008(r3), 0
+; CHECK-P10-NEXT: pstd r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32__int128___int128:
diff --git a/llvm/test/CodeGen/PowerPC/mma-acc-memops.ll b/llvm/test/CodeGen/PowerPC/mma-acc-memops.ll
index 90f38ee462896..6e3ea1bfa1200 100644
--- a/llvm/test/CodeGen/PowerPC/mma-acc-memops.ll
+++ b/llvm/test/CodeGen/PowerPC/mma-acc-memops.ll
@@ -102,23 +102,15 @@ define dso_local void @testUnalignedLdSt() {
; BE-PAIRED-LABEL: testUnalignedLdSt:
; BE-PAIRED: # %bb.0: # %entry
; BE-PAIRED-NEXT: addis r3, r2, f at toc@ha
-; BE-PAIRED-NEXT: li r4, 11
; BE-PAIRED-NEXT: addi r3, r3, f at toc@l
-; BE-PAIRED-NEXT: lxvx vs0, r3, r4
-; BE-PAIRED-NEXT: li r4, 27
-; BE-PAIRED-NEXT: lxvx vs1, r3, r4
-; BE-PAIRED-NEXT: li r4, 43
-; BE-PAIRED-NEXT: lxvx vs2, r3, r4
-; BE-PAIRED-NEXT: li r4, 59
-; BE-PAIRED-NEXT: lxvx vs3, r3, r4
-; BE-PAIRED-NEXT: li r4, 35
-; BE-PAIRED-NEXT: stxvx vs1, r3, r4
-; BE-PAIRED-NEXT: li r4, 19
-; BE-PAIRED-NEXT: stxvx vs0, r3, r4
-; BE-PAIRED-NEXT: li r4, 67
-; BE-PAIRED-NEXT: stxvx vs3, r3, r4
-; BE-PAIRED-NEXT: li r4, 51
-; BE-PAIRED-NEXT: stxvx vs2, r3, r4
+; BE-PAIRED-NEXT: plxv vs1, 27(r3), 0
+; BE-PAIRED-NEXT: plxv vs0, 11(r3), 0
+; BE-PAIRED-NEXT: plxv vs3, 59(r3), 0
+; BE-PAIRED-NEXT: plxv vs2, 43(r3), 0
+; BE-PAIRED-NEXT: pstxv vs1, 35(r3), 0
+; BE-PAIRED-NEXT: pstxv vs0, 19(r3), 0
+; BE-PAIRED-NEXT: pstxv vs3, 67(r3), 0
+; BE-PAIRED-NEXT: pstxv vs2, 51(r3), 0
; BE-PAIRED-NEXT: blr
entry:
%0 = bitcast <512 x i1>* @f to i8*
@@ -204,15 +196,11 @@ define dso_local void @testUnalignedLdStPair() {
; BE-PAIRED-LABEL: testUnalignedLdStPair:
; BE-PAIRED: # %bb.0: # %entry
; BE-PAIRED-NEXT: addis r3, r2, g at toc@ha
-; BE-PAIRED-NEXT: li r4, 11
; BE-PAIRED-NEXT: addi r3, r3, g at toc@l
-; BE-PAIRED-NEXT: lxvx v2, r3, r4
-; BE-PAIRED-NEXT: li r4, 27
-; BE-PAIRED-NEXT: lxvx v3, r3, r4
-; BE-PAIRED-NEXT: li r4, 35
-; BE-PAIRED-NEXT: stxvx v3, r3, r4
-; BE-PAIRED-NEXT: li r4, 19
-; BE-PAIRED-NEXT: stxvx v2, r3, r4
+; BE-PAIRED-NEXT: plxv v3, 27(r3), 0
+; BE-PAIRED-NEXT: plxv v2, 11(r3), 0
+; BE-PAIRED-NEXT: pstxv v3, 35(r3), 0
+; BE-PAIRED-NEXT: pstxv v2, 19(r3), 0
; BE-PAIRED-NEXT: blr
entry:
%0 = bitcast <256 x i1>* @g to i8*
diff --git a/llvm/test/CodeGen/PowerPC/mma-intrinsics.ll b/llvm/test/CodeGen/PowerPC/mma-intrinsics.ll
index ca0e2fdf8265f..77bf4a4eaa964 100644
--- a/llvm/test/CodeGen/PowerPC/mma-intrinsics.ll
+++ b/llvm/test/CodeGen/PowerPC/mma-intrinsics.ll
@@ -626,8 +626,7 @@ define void @test_ldst_1(i8* nocapture readonly %vqp, <256 x i1>* %vpp, <16 x i8
; CHECK-NEXT: lxv vs0, 48(r3)
; CHECK-NEXT: lxv vs3, 0(r3)
; CHECK-NEXT: lxv vs2, 16(r3)
-; CHECK-NEXT: li r3, 8
-; CHECK-NEXT: lxvpx vsp36, r4, r3
+; CHECK-NEXT: plxvp vsp36, 8(r4), 0
; CHECK-NEXT: xxmtacc acc0
; CHECK-NEXT: pmxvf64gernn acc0, vsp36, v2, 0, 0
; CHECK-NEXT: xxmfacc acc0
@@ -643,8 +642,7 @@ define void @test_ldst_1(i8* nocapture readonly %vqp, <256 x i1>* %vpp, <16 x i8
; CHECK-BE-NEXT: lxv vs0, 0(r3)
; CHECK-BE-NEXT: lxv vs3, 48(r3)
; CHECK-BE-NEXT: lxv vs2, 32(r3)
-; CHECK-BE-NEXT: li r3, 8
-; CHECK-BE-NEXT: lxvpx vsp36, r4, r3
+; CHECK-BE-NEXT: plxvp vsp36, 8(r4), 0
; CHECK-BE-NEXT: xxmtacc acc0
; CHECK-BE-NEXT: pmxvf64gernn acc0, vsp36, v2, 0, 0
; CHECK-BE-NEXT: xxmfacc acc0
diff --git a/llvm/test/CodeGen/PowerPC/p10-fi-elim.ll b/llvm/test/CodeGen/PowerPC/p10-fi-elim.ll
new file mode 100644
index 0000000000000..ac922d8673549
--- /dev/null
+++ b/llvm/test/CodeGen/PowerPC/p10-fi-elim.ll
@@ -0,0 +1,159 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu \
+; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
+; RUN: FileCheck %s
+; RUN: llc -verify-machineinstrs -mtriple=powerpc64-unknown-linux-gnu \
+; RUN: -mcpu=pwr10 -ppc-asm-full-reg-names -ppc-vsr-nums-as-vr < %s | \
+; RUN: FileCheck %s --check-prefix=CHECK-BE
+
+%96 = type <{ i32 }>
+%97 = type <{ i32 }>
+%98 = type <{ i32 }>
+%100 = type <{ i8, i8, i8, i8, i32, i64, i64, [1 x i64], [1 x i64], [1 x i64] }>
+%101 = type <{ i8, i8, i8, i8, i32, i64, i64, [1 x i64], [1 x i64], [1 x i64], [24 x i8] }>
+%102 = type <{ i8, i8, i8, i8, i32, i64, i64, [1 x i64], [1 x i64], [1 x i64] }>
+%103 = type <{ [152 x i8]*, i8, i8, i8, i8, [4 x i8], i32, [12 x i8], i32, [4 x i8] }>
+%104 = type <{ i32 }>
+%105 = type <{ i32 }>
+%106 = type <{ i32 }>
+
+; Function Attrs: nobuiltin norecurse
+define dso_local signext i32 @test_FI_elim([40 x i8]* noalias nocapture dereferenceable(40) %arg, [0 x %96]* noalias nocapture nonnull readonly %arg2, [0 x %97]* noalias nocapture nonnull readonly %arg3, [0 x %98]* noalias nocapture nonnull readonly %arg4, %100* noalias nocapture dereferenceable(48) %arg6, %101* noalias nocapture dereferenceable(72) %arg7) local_unnamed_addr #2 {
+; CHECK-LABEL: test_FI_elim:
+; CHECK: # %bb.0: # %bb
+; CHECK-NEXT: mflr r0
+; CHECK-NEXT: std r0, 16(r1)
+; CHECK-NEXT: stdu r1, -80(r1)
+; CHECK-NEXT: .cfi_def_cfa_offset 80
+; CHECK-NEXT: .cfi_offset lr, 16
+; CHECK-NEXT: mr r9, r6
+; CHECK-NEXT: mr r6, r5
+; CHECK-NEXT: li r5, 3
+; CHECK-NEXT: li r10, -127
+; CHECK-NEXT: lxv v2, 0(r3)
+; CHECK-NEXT: stb r5, 0(0)
+; CHECK-NEXT: stb r10, 0(r3)
+; CHECK-NEXT: stb r5, 0(r3)
+; CHECK-NEXT: lbz r5, 2(r7)
+; CHECK-NEXT: li r2, 1
+; CHECK-NEXT: stb r10, 0(r3)
+; CHECK-NEXT: pstxv v2, 64(r1), 0
+; CHECK-NEXT: vaddudm v3, v2, v2
+; CHECK-NEXT: mfvsrd r11, v2
+; CHECK-NEXT: li r0, 4
+; CHECK-NEXT: stw r2, 0(r3)
+; CHECK-NEXT: mr r7, r9
+; CHECK-NEXT: std r0, 0(r3)
+; CHECK-NEXT: rlwinm r5, r5, 0, 27, 27
+; CHECK-NEXT: mfvsrd r12, v3
+; CHECK-NEXT: neg r11, r11
+; CHECK-NEXT: stb r5, 0(0)
+; CHECK-NEXT: lbz r5, 2(r8)
+; CHECK-NEXT: neg r12, r12
+; CHECK-NEXT: std r11, 0(r3)
+; CHECK-NEXT: std r2, 0(r3)
+; CHECK-NEXT: std r0, 0(r3)
+; CHECK-NEXT: std r12, 0(r3)
+; CHECK-NEXT: rlwinm r5, r5, 0, 27, 27
+; CHECK-NEXT: stb r5, 0(r3)
+; CHECK-NEXT: li r5, 2
+; CHECK-NEXT: stw r5, 0(r3)
+; CHECK-NEXT: mr r5, r4
+; CHECK-NEXT: bl foo at notoc
+; CHECK-NEXT: extsw r3, r3
+; CHECK-NEXT: addi r1, r1, 80
+; CHECK-NEXT: ld r0, 16(r1)
+; CHECK-NEXT: mtlr r0
+; CHECK-NEXT: blr
+;
+; CHECK-BE-LABEL: test_FI_elim:
+; CHECK-BE: # %bb.0: # %bb
+; CHECK-BE-NEXT: mflr r0
+; CHECK-BE-NEXT: std r0, 16(r1)
+; CHECK-BE-NEXT: stdu r1, -176(r1)
+; CHECK-BE-NEXT: .cfi_def_cfa_offset 176
+; CHECK-BE-NEXT: .cfi_offset lr, 16
+; CHECK-BE-NEXT: .cfi_offset r30, -16
+; CHECK-BE-NEXT: mr r9, r6
+; CHECK-BE-NEXT: mr r6, r5
+; CHECK-BE-NEXT: li r5, 3
+; CHECK-BE-NEXT: li r11, -127
+; CHECK-BE-NEXT: lxv v2, 0(r3)
+; CHECK-BE-NEXT: std r30, 160(r1) # 8-byte Folded Spill
+; CHECK-BE-NEXT: pstxv v2, 144(r1), 0
+; CHECK-BE-NEXT: stb r5, 0(0)
+; CHECK-BE-NEXT: stb r11, 0(r3)
+; CHECK-BE-NEXT: stb r5, 0(r3)
+; CHECK-BE-NEXT: lbz r5, 2(r7)
+; CHECK-BE-NEXT: vaddudm v3, v2, v2
+; CHECK-BE-NEXT: mfvsrld r10, v2
+; CHECK-BE-NEXT: li r30, 1
+; CHECK-BE-NEXT: stb r11, 0(r3)
+; CHECK-BE-NEXT: li r0, 4
+; CHECK-BE-NEXT: stw r30, 0(r3)
+; CHECK-BE-NEXT: mr r7, r9
+; CHECK-BE-NEXT: std r0, 0(r3)
+; CHECK-BE-NEXT: rlwinm r5, r5, 0, 27, 27
+; CHECK-BE-NEXT: mfvsrld r12, v3
+; CHECK-BE-NEXT: stb r5, 0(0)
+; CHECK-BE-NEXT: lbz r5, 2(r8)
+; CHECK-BE-NEXT: neg r10, r10
+; CHECK-BE-NEXT: neg r12, r12
+; CHECK-BE-NEXT: std r10, 0(r3)
+; CHECK-BE-NEXT: std r30, 0(r3)
+; CHECK-BE-NEXT: std r0, 0(r3)
+; CHECK-BE-NEXT: rlwinm r5, r5, 0, 27, 27
+; CHECK-BE-NEXT: std r12, 0(r3)
+; CHECK-BE-NEXT: stb r5, 0(r3)
+; CHECK-BE-NEXT: li r5, 2
+; CHECK-BE-NEXT: stw r5, 0(r3)
+; CHECK-BE-NEXT: mr r5, r4
+; CHECK-BE-NEXT: bl foo
+; CHECK-BE-NEXT: nop
+; CHECK-BE-NEXT: ld r30, 160(r1) # 8-byte Folded Reload
+; CHECK-BE-NEXT: extsw r3, r3
+; CHECK-BE-NEXT: addi r1, r1, 176
+; CHECK-BE-NEXT: ld r0, 16(r1)
+; CHECK-BE-NEXT: mtlr r0
+; CHECK-BE-NEXT: blr
+bb:
+ %i = alloca %102, align 8
+ %i8 = load <2 x i64>, <2 x i64>* undef, align 8
+ %i9 = extractelement <2 x i64> %i8, i32 1
+ %i10 = sub i64 0, %i9
+ %i11 = load <2 x i64>, <2 x i64>* undef, align 8
+ %i12 = load <2 x i64>, <2 x i64>* undef, align 8
+ %i13 = add nsw <2 x i64> %i11, %i12
+ %i14 = extractelement <2 x i64> %i13, i32 1
+ %i15 = sub i64 0, %i14
+ store i8 3, i8* null, align 8
+ store i8 -127, i8* undef, align 1
+ store i64 4, i64* undef, align 8
+ store i32 1, i32* undef, align 4
+ %i16 = getelementptr inbounds %102, %102* %i, i64 0, i32 8, i64 0
+ %i17 = bitcast i64* %i16 to <2 x i64>*
+ store <2 x i64> %i8, <2 x i64>* %i17, align 8
+ store i64 %i10, i64* undef, align 8
+ store i8 3, i8* undef, align 8
+ %i18 = getelementptr inbounds %100, %100* %arg6, i64 0, i32 2
+ %i19 = load i8, i8* %i18, align 1
+ %i20 = and i8 %i19, 16
+ store i8 %i20, i8* null, align 2
+ store i8 -127, i8* undef, align 1
+ store i64 1, i64* undef, align 8
+ %i21 = getelementptr inbounds %101, %101* %arg7, i64 0, i32 2
+ %i22 = load i8, i8* %i21, align 1
+ %i23 = and i8 %i22, 16
+ store i8 %i23, i8* undef, align 2
+ store i64 4, i64* undef, align 8
+ store i32 2, i32* undef, align 4
+ store i64 %i15, i64* undef, align 8
+ %i24 = bitcast [40 x i8]* %arg to %103*
+ %i25 = bitcast [0 x %96]* %arg2 to [0 x %104]*
+ %i26 = bitcast [0 x %97]* %arg3 to [0 x %105]*
+ %i27 = bitcast [0 x %98]* %arg4 to [0 x %106]*
+ %i28 = call i32 @foo(%103* nonnull %i24, i32* nonnull undef, [0 x %104]* %i25, [0 x %105]* %i26, [0 x %106]* %i27)
+ ret i32 %i28
+}
+
+declare dso_local i32 @foo(%103*, i32*, [0 x %104]*, [0 x %105]*, [0 x %106]*) local_unnamed_addr #1
diff --git a/llvm/test/CodeGen/PowerPC/paired-vector-intrinsics.ll b/llvm/test/CodeGen/PowerPC/paired-vector-intrinsics.ll
index 9ebc89f79cae8..89b0ad1c0cf82 100644
--- a/llvm/test/CodeGen/PowerPC/paired-vector-intrinsics.ll
+++ b/llvm/test/CodeGen/PowerPC/paired-vector-intrinsics.ll
@@ -167,30 +167,26 @@ entry:
define void @test_ldst_3(<256 x i1>* %vpp, <256 x i1>* %vp2) {
; CHECK-LABEL: test_ldst_3:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: li r5, 18
-; CHECK-NEXT: lxvpx vsp34, r3, r5
-; CHECK-NEXT: stxvpx vsp34, r4, r5
+; CHECK-NEXT: plxvp vsp34, 18(r3), 0
+; CHECK-NEXT: pstxvp vsp34, 18(r4), 0
; CHECK-NEXT: blr
;
; CHECK-NOMMA-LABEL: test_ldst_3:
; CHECK-NOMMA: # %bb.0: # %entry
-; CHECK-NOMMA-NEXT: li r5, 18
-; CHECK-NOMMA-NEXT: lxvpx vsp34, r3, r5
-; CHECK-NOMMA-NEXT: stxvpx vsp34, r4, r5
+; CHECK-NOMMA-NEXT: plxvp vsp34, 18(r3), 0
+; CHECK-NOMMA-NEXT: pstxvp vsp34, 18(r4), 0
; CHECK-NOMMA-NEXT: blr
;
; CHECK-BE-LABEL: test_ldst_3:
; CHECK-BE: # %bb.0: # %entry
-; CHECK-BE-NEXT: li r5, 18
-; CHECK-BE-NEXT: lxvpx vsp34, r3, r5
-; CHECK-BE-NEXT: stxvpx vsp34, r4, r5
+; CHECK-BE-NEXT: plxvp vsp34, 18(r3), 0
+; CHECK-BE-NEXT: pstxvp vsp34, 18(r4), 0
; CHECK-BE-NEXT: blr
;
; CHECK-BE-NOMMA-LABEL: test_ldst_3:
; CHECK-BE-NOMMA: # %bb.0: # %entry
-; CHECK-BE-NOMMA-NEXT: li r5, 18
-; CHECK-BE-NOMMA-NEXT: lxvpx vsp34, r3, r5
-; CHECK-BE-NOMMA-NEXT: stxvpx vsp34, r4, r5
+; CHECK-BE-NOMMA-NEXT: plxvp vsp34, 18(r3), 0
+; CHECK-BE-NOMMA-NEXT: pstxvp vsp34, 18(r4), 0
; CHECK-BE-NOMMA-NEXT: blr
entry:
%0 = bitcast <256 x i1>* %vpp to i8*
@@ -205,30 +201,26 @@ entry:
define void @test_ldst_4(<256 x i1>* %vpp, <256 x i1>* %vp2) {
; CHECK-LABEL: test_ldst_4:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: li r5, 1
-; CHECK-NEXT: lxvpx vsp34, r3, r5
-; CHECK-NEXT: stxvpx vsp34, r4, r5
+; CHECK-NEXT: plxvp vsp34, 1(r3), 0
+; CHECK-NEXT: pstxvp vsp34, 1(r4), 0
; CHECK-NEXT: blr
;
; CHECK-NOMMA-LABEL: test_ldst_4:
; CHECK-NOMMA: # %bb.0: # %entry
-; CHECK-NOMMA-NEXT: li r5, 1
-; CHECK-NOMMA-NEXT: lxvpx vsp34, r3, r5
-; CHECK-NOMMA-NEXT: stxvpx vsp34, r4, r5
+; CHECK-NOMMA-NEXT: plxvp vsp34, 1(r3), 0
+; CHECK-NOMMA-NEXT: pstxvp vsp34, 1(r4), 0
; CHECK-NOMMA-NEXT: blr
;
; CHECK-BE-LABEL: test_ldst_4:
; CHECK-BE: # %bb.0: # %entry
-; CHECK-BE-NEXT: li r5, 1
-; CHECK-BE-NEXT: lxvpx vsp34, r3, r5
-; CHECK-BE-NEXT: stxvpx vsp34, r4, r5
+; CHECK-BE-NEXT: plxvp vsp34, 1(r3), 0
+; CHECK-BE-NEXT: pstxvp vsp34, 1(r4), 0
; CHECK-BE-NEXT: blr
;
; CHECK-BE-NOMMA-LABEL: test_ldst_4:
; CHECK-BE-NOMMA: # %bb.0: # %entry
-; CHECK-BE-NOMMA-NEXT: li r5, 1
-; CHECK-BE-NOMMA-NEXT: lxvpx vsp34, r3, r5
-; CHECK-BE-NOMMA-NEXT: stxvpx vsp34, r4, r5
+; CHECK-BE-NOMMA-NEXT: plxvp vsp34, 1(r3), 0
+; CHECK-BE-NOMMA-NEXT: pstxvp vsp34, 1(r4), 0
; CHECK-BE-NOMMA-NEXT: blr
entry:
%0 = bitcast <256 x i1>* %vpp to i8*
@@ -243,30 +235,26 @@ entry:
define void @test_ldst_5(<256 x i1>* %vpp, <256 x i1>* %vp2) {
; CHECK-LABEL: test_ldst_5:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: li r5, 42
-; CHECK-NEXT: lxvpx vsp34, r3, r5
-; CHECK-NEXT: stxvpx vsp34, r4, r5
+; CHECK-NEXT: plxvp vsp34, 42(r3), 0
+; CHECK-NEXT: pstxvp vsp34, 42(r4), 0
; CHECK-NEXT: blr
;
; CHECK-NOMMA-LABEL: test_ldst_5:
; CHECK-NOMMA: # %bb.0: # %entry
-; CHECK-NOMMA-NEXT: li r5, 42
-; CHECK-NOMMA-NEXT: lxvpx vsp34, r3, r5
-; CHECK-NOMMA-NEXT: stxvpx vsp34, r4, r5
+; CHECK-NOMMA-NEXT: plxvp vsp34, 42(r3), 0
+; CHECK-NOMMA-NEXT: pstxvp vsp34, 42(r4), 0
; CHECK-NOMMA-NEXT: blr
;
; CHECK-BE-LABEL: test_ldst_5:
; CHECK-BE: # %bb.0: # %entry
-; CHECK-BE-NEXT: li r5, 42
-; CHECK-BE-NEXT: lxvpx vsp34, r3, r5
-; CHECK-BE-NEXT: stxvpx vsp34, r4, r5
+; CHECK-BE-NEXT: plxvp vsp34, 42(r3), 0
+; CHECK-BE-NEXT: pstxvp vsp34, 42(r4), 0
; CHECK-BE-NEXT: blr
;
; CHECK-BE-NOMMA-LABEL: test_ldst_5:
; CHECK-BE-NOMMA: # %bb.0: # %entry
-; CHECK-BE-NOMMA-NEXT: li r5, 42
-; CHECK-BE-NOMMA-NEXT: lxvpx vsp34, r3, r5
-; CHECK-BE-NOMMA-NEXT: stxvpx vsp34, r4, r5
+; CHECK-BE-NOMMA-NEXT: plxvp vsp34, 42(r3), 0
+; CHECK-BE-NOMMA-NEXT: pstxvp vsp34, 42(r4), 0
; CHECK-BE-NOMMA-NEXT: blr
entry:
%0 = bitcast <256 x i1>* %vpp to i8*
@@ -317,30 +305,26 @@ define void @test_ldst_7(<256 x i1>* %vpp, <256 x i1>* %vp2) {
; test case is a constant that fits within 34-bits.
; CHECK-LABEL: test_ldst_7:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: pli r5, 32799
-; CHECK-NEXT: lxvpx vsp34, r3, r5
-; CHECK-NEXT: stxvpx vsp34, r4, r5
+; CHECK-NEXT: plxvp vsp34, 32799(r3), 0
+; CHECK-NEXT: pstxvp vsp34, 32799(r4), 0
; CHECK-NEXT: blr
;
; CHECK-NOMMA-LABEL: test_ldst_7:
; CHECK-NOMMA: # %bb.0: # %entry
-; CHECK-NOMMA-NEXT: pli r5, 32799
-; CHECK-NOMMA-NEXT: lxvpx vsp34, r3, r5
-; CHECK-NOMMA-NEXT: stxvpx vsp34, r4, r5
+; CHECK-NOMMA-NEXT: plxvp vsp34, 32799(r3), 0
+; CHECK-NOMMA-NEXT: pstxvp vsp34, 32799(r4), 0
; CHECK-NOMMA-NEXT: blr
;
; CHECK-BE-LABEL: test_ldst_7:
; CHECK-BE: # %bb.0: # %entry
-; CHECK-BE-NEXT: pli r5, 32799
-; CHECK-BE-NEXT: lxvpx vsp34, r3, r5
-; CHECK-BE-NEXT: stxvpx vsp34, r4, r5
+; CHECK-BE-NEXT: plxvp vsp34, 32799(r3), 0
+; CHECK-BE-NEXT: pstxvp vsp34, 32799(r4), 0
; CHECK-BE-NEXT: blr
;
; CHECK-BE-NOMMA-LABEL: test_ldst_7:
; CHECK-BE-NOMMA: # %bb.0: # %entry
-; CHECK-BE-NOMMA-NEXT: pli r5, 32799
-; CHECK-BE-NOMMA-NEXT: lxvpx vsp34, r3, r5
-; CHECK-BE-NOMMA-NEXT: stxvpx vsp34, r4, r5
+; CHECK-BE-NOMMA-NEXT: plxvp vsp34, 32799(r3), 0
+; CHECK-BE-NOMMA-NEXT: pstxvp vsp34, 32799(r4), 0
; CHECK-BE-NOMMA-NEXT: blr
entry:
%0 = bitcast <256 x i1>* %vpp to i8*
diff --git a/llvm/test/CodeGen/PowerPC/pcrel_ldst.ll b/llvm/test/CodeGen/PowerPC/pcrel_ldst.ll
index 797080557ecd9..418e656d9a083 100644
--- a/llvm/test/CodeGen/PowerPC/pcrel_ldst.ll
+++ b/llvm/test/CodeGen/PowerPC/pcrel_ldst.ll
@@ -1038,12 +1038,11 @@ define dso_local void @testGlob7PtrPlus3() {
; CHECK-P10-BE-LABEL: testGlob7PtrPlus3:
; CHECK-P10-BE: # %bb.0: # %entry
; CHECK-P10-BE-NEXT: addis r3, r2, GlobLd7 at toc@ha
-; CHECK-P10-BE-NEXT: li r4, 3
-; CHECK-P10-BE-NEXT: addis r5, r2, GlobSt7 at toc@ha
+; CHECK-P10-BE-NEXT: addis r4, r2, GlobSt7 at toc@ha
; CHECK-P10-BE-NEXT: addi r3, r3, GlobLd7 at toc@l
-; CHECK-P10-BE-NEXT: addi r5, r5, GlobSt7 at toc@l
-; CHECK-P10-BE-NEXT: ldx r3, r3, r4
-; CHECK-P10-BE-NEXT: stdx r3, r5, r4
+; CHECK-P10-BE-NEXT: addi r4, r4, GlobSt7 at toc@l
+; CHECK-P10-BE-NEXT: pld r3, 3(r3), 0
+; CHECK-P10-BE-NEXT: pstd r3, 3(r4), 0
; CHECK-P10-BE-NEXT: blr
;
; CHECK-LABEL: testGlob7PtrPlus3:
@@ -1224,12 +1223,11 @@ define dso_local void @testGlob8PtrPlus3() {
; CHECK-P10-BE-LABEL: testGlob8PtrPlus3:
; CHECK-P10-BE: # %bb.0: # %entry
; CHECK-P10-BE-NEXT: addis r3, r2, GlobLd8 at toc@ha
-; CHECK-P10-BE-NEXT: li r4, 3
-; CHECK-P10-BE-NEXT: addis r5, r2, GlobSt8 at toc@ha
+; CHECK-P10-BE-NEXT: addis r4, r2, GlobSt8 at toc@ha
; CHECK-P10-BE-NEXT: addi r3, r3, GlobLd8 at toc@l
-; CHECK-P10-BE-NEXT: addi r5, r5, GlobSt8 at toc@l
-; CHECK-P10-BE-NEXT: ldx r3, r3, r4
-; CHECK-P10-BE-NEXT: stdx r3, r5, r4
+; CHECK-P10-BE-NEXT: addi r4, r4, GlobSt8 at toc@l
+; CHECK-P10-BE-NEXT: pld r3, 3(r3), 0
+; CHECK-P10-BE-NEXT: pstd r3, 3(r4), 0
; CHECK-P10-BE-NEXT: blr
;
; CHECK-LABEL: testGlob8PtrPlus3:
@@ -1566,12 +1564,11 @@ define dso_local void @testGlob10PtrPlus3() {
; CHECK-P10-BE-LABEL: testGlob10PtrPlus3:
; CHECK-P10-BE: # %bb.0: # %entry
; CHECK-P10-BE-NEXT: addis r3, r2, GlobLd10 at toc@ha
-; CHECK-P10-BE-NEXT: li r4, 3
-; CHECK-P10-BE-NEXT: addis r5, r2, GlobSt10 at toc@ha
+; CHECK-P10-BE-NEXT: addis r4, r2, GlobSt10 at toc@ha
; CHECK-P10-BE-NEXT: addi r3, r3, GlobLd10 at toc@l
-; CHECK-P10-BE-NEXT: addi r5, r5, GlobSt10 at toc@l
-; CHECK-P10-BE-NEXT: ldx r3, r3, r4
-; CHECK-P10-BE-NEXT: stdx r3, r5, r4
+; CHECK-P10-BE-NEXT: addi r4, r4, GlobSt10 at toc@l
+; CHECK-P10-BE-NEXT: pld r3, 3(r3), 0
+; CHECK-P10-BE-NEXT: pstd r3, 3(r4), 0
; CHECK-P10-BE-NEXT: blr
;
; CHECK-LABEL: testGlob10PtrPlus3:
@@ -1768,12 +1765,11 @@ define dso_local void @testGlob11PtrPlus3() {
; CHECK-P10-BE-LABEL: testGlob11PtrPlus3:
; CHECK-P10-BE: # %bb.0: # %entry
; CHECK-P10-BE-NEXT: addis r3, r2, GlobLd11 at toc@ha
-; CHECK-P10-BE-NEXT: li r4, 3
; CHECK-P10-BE-NEXT: addi r3, r3, GlobLd11 at toc@l
-; CHECK-P10-BE-NEXT: lxvx vs0, r3, r4
+; CHECK-P10-BE-NEXT: plxv vs0, 3(r3), 0
; CHECK-P10-BE-NEXT: addis r3, r2, GlobSt11 at toc@ha
; CHECK-P10-BE-NEXT: addi r3, r3, GlobSt11 at toc@l
-; CHECK-P10-BE-NEXT: stxvx vs0, r3, r4
+; CHECK-P10-BE-NEXT: pstxv vs0, 3(r3), 0
; CHECK-P10-BE-NEXT: blr
;
; CHECK-P9-LABEL: testGlob11PtrPlus3:
@@ -1825,12 +1821,11 @@ define dso_local void @testGlob11PtrPlus4() {
; CHECK-P10-BE-LABEL: testGlob11PtrPlus4:
; CHECK-P10-BE: # %bb.0: # %entry
; CHECK-P10-BE-NEXT: addis r3, r2, GlobLd11 at toc@ha
-; CHECK-P10-BE-NEXT: li r4, 4
; CHECK-P10-BE-NEXT: addi r3, r3, GlobLd11 at toc@l
-; CHECK-P10-BE-NEXT: lxvx vs0, r3, r4
+; CHECK-P10-BE-NEXT: plxv vs0, 4(r3), 0
; CHECK-P10-BE-NEXT: addis r3, r2, GlobSt11 at toc@ha
; CHECK-P10-BE-NEXT: addi r3, r3, GlobSt11 at toc@l
-; CHECK-P10-BE-NEXT: stxvx vs0, r3, r4
+; CHECK-P10-BE-NEXT: pstxv vs0, 4(r3), 0
; CHECK-P10-BE-NEXT: blr
;
; CHECK-P9-LABEL: testGlob11PtrPlus4:
@@ -2052,12 +2047,11 @@ define dso_local void @testGlob12PtrPlus3() {
; CHECK-P10-BE-LABEL: testGlob12PtrPlus3:
; CHECK-P10-BE: # %bb.0: # %entry
; CHECK-P10-BE-NEXT: addis r3, r2, GlobLd12 at toc@ha
-; CHECK-P10-BE-NEXT: li r4, 3
; CHECK-P10-BE-NEXT: addi r3, r3, GlobLd12 at toc@l
-; CHECK-P10-BE-NEXT: lxvx vs0, r3, r4
+; CHECK-P10-BE-NEXT: plxv vs0, 3(r3), 0
; CHECK-P10-BE-NEXT: addis r3, r2, GlobSt12 at toc@ha
; CHECK-P10-BE-NEXT: addi r3, r3, GlobSt12 at toc@l
-; CHECK-P10-BE-NEXT: stxvx vs0, r3, r4
+; CHECK-P10-BE-NEXT: pstxv vs0, 3(r3), 0
; CHECK-P10-BE-NEXT: blr
;
; CHECK-P9-LABEL: testGlob12PtrPlus3:
@@ -2109,12 +2103,11 @@ define dso_local void @testGlob12PtrPlus4() {
; CHECK-P10-BE-LABEL: testGlob12PtrPlus4:
; CHECK-P10-BE: # %bb.0: # %entry
; CHECK-P10-BE-NEXT: addis r3, r2, GlobLd12 at toc@ha
-; CHECK-P10-BE-NEXT: li r4, 4
; CHECK-P10-BE-NEXT: addi r3, r3, GlobLd12 at toc@l
-; CHECK-P10-BE-NEXT: lxvx vs0, r3, r4
+; CHECK-P10-BE-NEXT: plxv vs0, 4(r3), 0
; CHECK-P10-BE-NEXT: addis r3, r2, GlobSt12 at toc@ha
; CHECK-P10-BE-NEXT: addi r3, r3, GlobSt12 at toc@l
-; CHECK-P10-BE-NEXT: stxvx vs0, r3, r4
+; CHECK-P10-BE-NEXT: pstxv vs0, 4(r3), 0
; CHECK-P10-BE-NEXT: blr
;
; CHECK-P9-LABEL: testGlob12PtrPlus4:
diff --git a/llvm/test/CodeGen/PowerPC/scalar-double-ldst.ll b/llvm/test/CodeGen/PowerPC/scalar-double-ldst.ll
index 1b8eff65b02b5..e0a12a2b14b1e 100644
--- a/llvm/test/CodeGen/PowerPC/scalar-double-ldst.ll
+++ b/llvm/test/CodeGen/PowerPC/scalar-double-ldst.ll
@@ -2516,8 +2516,7 @@ entry:
define dso_local double @ld_align32_double_uint64_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_double_uint64_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lfdx f0, r3, r4
+; CHECK-P10-NEXT: plfd f0, 99999000(r3), 0
; CHECK-P10-NEXT: xscvuxddp f1, f0
; CHECK-P10-NEXT: blr
;
@@ -2650,8 +2649,7 @@ define dso_local double @ld_disjoint_align32_double_uint64_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lfdx f0, r3, r4
+; CHECK-P10-NEXT: plfd f0, 999990000(r3), 0
; CHECK-P10-NEXT: xscvuxddp f1, f0
; CHECK-P10-NEXT: blr
;
@@ -2826,8 +2824,7 @@ entry:
define dso_local double @ld_align32_double_int64_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_double_int64_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lfdx f0, r3, r4
+; CHECK-P10-NEXT: plfd f0, 99999000(r3), 0
; CHECK-P10-NEXT: xscvsxddp f1, f0
; CHECK-P10-NEXT: blr
;
@@ -2960,8 +2957,7 @@ define dso_local double @ld_disjoint_align32_double_int64_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lfdx f0, r3, r4
+; CHECK-P10-NEXT: plfd f0, 999990000(r3), 0
; CHECK-P10-NEXT: xscvsxddp f1, f0
; CHECK-P10-NEXT: blr
;
@@ -3134,8 +3130,7 @@ entry:
define dso_local double @ld_align32_double_float(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_double_float:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lfsx f1, r3, r4
+; CHECK-P10-NEXT: plfs f1, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align32_double_float:
@@ -3259,8 +3254,7 @@ define dso_local double @ld_disjoint_align32_double_float(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lfsx f1, r3, r4
+; CHECK-P10-NEXT: plfs f1, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_double_float:
@@ -3420,8 +3414,7 @@ entry:
define dso_local double @ld_align32_double_double(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_double_double:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lfdx f1, r3, r4
+; CHECK-P10-NEXT: plfd f1, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align32_double_double:
@@ -3538,8 +3531,7 @@ define dso_local double @ld_disjoint_align32_double_double(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lfdx f1, r3, r4
+; CHECK-P10-NEXT: plfd f1, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_double_double:
@@ -6138,9 +6130,8 @@ entry:
define dso_local void @st_align32_double_uint64_t(i8* nocapture %ptr, double %str) {
; CHECK-P10-LABEL: st_align32_double_uint64_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: xscvdpuxds f0, f1
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: stxsdx f0, r3, r4
+; CHECK-P10-NEXT: xscvdpuxds v2, f1
+; CHECK-P10-NEXT: pstxsd v2, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_double_uint64_t:
@@ -6300,11 +6291,10 @@ entry:
define dso_local void @st_disjoint_align32_double_uint64_t(i64 %ptr, double %str) {
; CHECK-P10-LABEL: st_disjoint_align32_double_uint64_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: xscvdpuxds f0, f1
+; CHECK-P10-NEXT: xscvdpuxds v2, f1
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: stxsdx f0, r3, r4
+; CHECK-P10-NEXT: pstxsd v2, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_double_uint64_t:
@@ -6526,9 +6516,8 @@ entry:
define dso_local void @st_align32_double_int64_t(i8* nocapture %ptr, double %str) {
; CHECK-P10-LABEL: st_align32_double_int64_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: xscvdpsxds f0, f1
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: stxsdx f0, r3, r4
+; CHECK-P10-NEXT: xscvdpsxds v2, f1
+; CHECK-P10-NEXT: pstxsd v2, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_double_int64_t:
@@ -6688,11 +6677,10 @@ entry:
define dso_local void @st_disjoint_align32_double_int64_t(i64 %ptr, double %str) {
; CHECK-P10-LABEL: st_disjoint_align32_double_int64_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: xscvdpsxds f0, f1
+; CHECK-P10-NEXT: xscvdpsxds v2, f1
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: stxsdx f0, r3, r4
+; CHECK-P10-NEXT: pstxsd v2, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_double_int64_t:
@@ -6902,8 +6890,7 @@ define dso_local void @st_align32_double_float(i8* nocapture %ptr, double %str)
; CHECK-P10-LABEL: st_align32_double_float:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: xsrsp f0, f1
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: stfsx f0, r3, r4
+; CHECK-P10-NEXT: pstfs f0, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_double_float:
@@ -7036,8 +7023,7 @@ define dso_local void @st_disjoint_align32_double_float(i64 %ptr, double %str) {
; CHECK-P10-NEXT: xsrsp f0, f1
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: stfsx f0, r3, r4
+; CHECK-P10-NEXT: pstfs f0, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_double_float:
@@ -7218,8 +7204,7 @@ entry:
define dso_local void @st_align32_double_double(i8* nocapture %ptr, double %str) {
; CHECK-P10-LABEL: st_align32_double_double:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: stfdx f1, r3, r4
+; CHECK-P10-NEXT: pstfd f1, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_double_double:
@@ -7336,8 +7321,7 @@ define dso_local void @st_disjoint_align32_double_double(i64 %ptr, double %str)
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: stfdx f1, r3, r4
+; CHECK-P10-NEXT: pstfd f1, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_double_double:
diff --git a/llvm/test/CodeGen/PowerPC/scalar-float-ldst.ll b/llvm/test/CodeGen/PowerPC/scalar-float-ldst.ll
index e4d3c525e2377..b6a5ccb93d033 100644
--- a/llvm/test/CodeGen/PowerPC/scalar-float-ldst.ll
+++ b/llvm/test/CodeGen/PowerPC/scalar-float-ldst.ll
@@ -2516,8 +2516,7 @@ entry:
define dso_local float @ld_align32_float_uint64_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_float_uint64_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lfdx f0, r3, r4
+; CHECK-P10-NEXT: plfd f0, 99999000(r3), 0
; CHECK-P10-NEXT: xscvuxdsp f1, f0
; CHECK-P10-NEXT: blr
;
@@ -2650,8 +2649,7 @@ define dso_local float @ld_disjoint_align32_float_uint64_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lfdx f0, r3, r4
+; CHECK-P10-NEXT: plfd f0, 999990000(r3), 0
; CHECK-P10-NEXT: xscvuxdsp f1, f0
; CHECK-P10-NEXT: blr
;
@@ -2826,8 +2824,7 @@ entry:
define dso_local float @ld_align32_float_int64_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_float_int64_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lfdx f0, r3, r4
+; CHECK-P10-NEXT: plfd f0, 99999000(r3), 0
; CHECK-P10-NEXT: xscvsxdsp f1, f0
; CHECK-P10-NEXT: blr
;
@@ -2960,8 +2957,7 @@ define dso_local float @ld_disjoint_align32_float_int64_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lfdx f0, r3, r4
+; CHECK-P10-NEXT: plfd f0, 999990000(r3), 0
; CHECK-P10-NEXT: xscvsxdsp f1, f0
; CHECK-P10-NEXT: blr
;
@@ -3132,8 +3128,7 @@ entry:
define dso_local float @ld_align32_float_float(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_float_float:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lfsx f1, r3, r4
+; CHECK-P10-NEXT: plfs f1, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align32_float_float:
@@ -3250,8 +3245,7 @@ define dso_local float @ld_disjoint_align32_float_float(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lfsx f1, r3, r4
+; CHECK-P10-NEXT: plfs f1, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_float_float:
@@ -3409,8 +3403,7 @@ entry:
define dso_local float @ld_align32_float_double(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_float_double:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lfdx f0, r3, r4
+; CHECK-P10-NEXT: plfd f0, 99999000(r3), 0
; CHECK-P10-NEXT: xsrsp f1, f0
; CHECK-P10-NEXT: blr
;
@@ -3543,8 +3536,7 @@ define dso_local float @ld_disjoint_align32_float_double(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lfdx f0, r3, r4
+; CHECK-P10-NEXT: plfd f0, 999990000(r3), 0
; CHECK-P10-NEXT: xsrsp f1, f0
; CHECK-P10-NEXT: blr
;
@@ -6160,9 +6152,8 @@ entry:
define dso_local void @st_align32_float_uint64_t(i8* nocapture %ptr, float %str) {
; CHECK-P10-LABEL: st_align32_float_uint64_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: xscvdpuxds f0, f1
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: stxsdx f0, r3, r4
+; CHECK-P10-NEXT: xscvdpuxds v2, f1
+; CHECK-P10-NEXT: pstxsd v2, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_float_uint64_t:
@@ -6322,11 +6313,10 @@ entry:
define dso_local void @st_disjoint_align32_float_uint64_t(i64 %ptr, float %str) {
; CHECK-P10-LABEL: st_disjoint_align32_float_uint64_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: xscvdpuxds f0, f1
+; CHECK-P10-NEXT: xscvdpuxds v2, f1
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: stxsdx f0, r3, r4
+; CHECK-P10-NEXT: pstxsd v2, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_float_uint64_t:
@@ -6548,9 +6538,8 @@ entry:
define dso_local void @st_align32_float_int64_t(i8* nocapture %ptr, float %str) {
; CHECK-P10-LABEL: st_align32_float_int64_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: xscvdpsxds f0, f1
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: stxsdx f0, r3, r4
+; CHECK-P10-NEXT: xscvdpsxds v2, f1
+; CHECK-P10-NEXT: pstxsd v2, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_float_int64_t:
@@ -6710,11 +6699,10 @@ entry:
define dso_local void @st_disjoint_align32_float_int64_t(i64 %ptr, float %str) {
; CHECK-P10-LABEL: st_disjoint_align32_float_int64_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: xscvdpsxds f0, f1
+; CHECK-P10-NEXT: xscvdpsxds v2, f1
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: stxsdx f0, r3, r4
+; CHECK-P10-NEXT: pstxsd v2, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_float_int64_t:
@@ -6919,8 +6907,7 @@ entry:
define dso_local void @st_align32_float_float(i8* nocapture %ptr, float %str) {
; CHECK-P10-LABEL: st_align32_float_float:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: stfsx f1, r3, r4
+; CHECK-P10-NEXT: pstfs f1, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_float_float:
@@ -7037,8 +7024,7 @@ define dso_local void @st_disjoint_align32_float_float(i64 %ptr, float %str) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: stfsx f1, r3, r4
+; CHECK-P10-NEXT: pstfs f1, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_float_float:
@@ -7194,8 +7180,7 @@ entry:
define dso_local void @st_align32_float_double(i8* nocapture %ptr, float %str) {
; CHECK-P10-LABEL: st_align32_float_double:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: stfdx f1, r3, r4
+; CHECK-P10-NEXT: pstfd f1, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_float_double:
@@ -7319,8 +7304,7 @@ define dso_local void @st_disjoint_align32_float_double(i64 %ptr, float %str) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: stfdx f1, r3, r4
+; CHECK-P10-NEXT: pstfd f1, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_float_double:
diff --git a/llvm/test/CodeGen/PowerPC/scalar-i16-ldst.ll b/llvm/test/CodeGen/PowerPC/scalar-i16-ldst.ll
index bd9e132346b9b..ce17ad3fea3b6 100644
--- a/llvm/test/CodeGen/PowerPC/scalar-i16-ldst.ll
+++ b/llvm/test/CodeGen/PowerPC/scalar-i16-ldst.ll
@@ -50,8 +50,7 @@ entry:
define dso_local signext i16 @ld_align32_int16_t_int8_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_int16_t_int8_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 99999000(r3), 0
; CHECK-P10-NEXT: extsb r3, r3
; CHECK-P10-NEXT: blr
;
@@ -181,8 +180,7 @@ define dso_local signext i16 @ld_disjoint_align32_int16_t_int8_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 999990000(r3), 0
; CHECK-P10-NEXT: extsb r3, r3
; CHECK-P10-NEXT: blr
;
@@ -353,8 +351,7 @@ entry:
define dso_local signext i16 @ld_align32_int16_t_uint16_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_int16_t_uint16_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lhax r3, r3, r4
+; CHECK-P10-NEXT: plha r3, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align32_int16_t_uint16_t:
@@ -471,8 +468,7 @@ define dso_local signext i16 @ld_disjoint_align32_int16_t_uint16_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lhax r3, r3, r4
+; CHECK-P10-NEXT: plha r3, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_int16_t_uint16_t:
@@ -638,14 +634,12 @@ entry:
define dso_local signext i16 @ld_align32_int16_t_uint32_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LE-LABEL: ld_align32_int16_t_uint32_t:
; CHECK-P10-LE: # %bb.0: # %entry
-; CHECK-P10-LE-NEXT: pli r4, 99999000
-; CHECK-P10-LE-NEXT: lhax r3, r3, r4
+; CHECK-P10-LE-NEXT: plha r3, 99999000(r3), 0
; CHECK-P10-LE-NEXT: blr
;
; CHECK-P10-BE-LABEL: ld_align32_int16_t_uint32_t:
; CHECK-P10-BE: # %bb.0: # %entry
-; CHECK-P10-BE-NEXT: pli r4, 99999002
-; CHECK-P10-BE-NEXT: lhax r3, r3, r4
+; CHECK-P10-BE-NEXT: plha r3, 99999002(r3), 0
; CHECK-P10-BE-NEXT: blr
;
; CHECK-P9-LE-LABEL: ld_align32_int16_t_uint32_t:
@@ -855,16 +849,14 @@ define dso_local signext i16 @ld_disjoint_align32_int16_t_uint32_t(i64 %ptr) {
; CHECK-P10-LE: # %bb.0: # %entry
; CHECK-P10-LE-NEXT: lis r4, -15264
; CHECK-P10-LE-NEXT: and r3, r3, r4
-; CHECK-P10-LE-NEXT: pli r4, 999990000
-; CHECK-P10-LE-NEXT: lhax r3, r3, r4
+; CHECK-P10-LE-NEXT: plha r3, 999990000(r3), 0
; CHECK-P10-LE-NEXT: blr
;
; CHECK-P10-BE-LABEL: ld_disjoint_align32_int16_t_uint32_t:
; CHECK-P10-BE: # %bb.0: # %entry
; CHECK-P10-BE-NEXT: lis r4, -15264
; CHECK-P10-BE-NEXT: and r3, r3, r4
-; CHECK-P10-BE-NEXT: pli r4, 999990002
-; CHECK-P10-BE-NEXT: lhax r3, r3, r4
+; CHECK-P10-BE-NEXT: plha r3, 999990002(r3), 0
; CHECK-P10-BE-NEXT: blr
;
; CHECK-P9-LE-LABEL: ld_disjoint_align32_int16_t_uint32_t:
@@ -1176,14 +1168,12 @@ entry:
define dso_local signext i16 @ld_align32_int16_t_uint64_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LE-LABEL: ld_align32_int16_t_uint64_t:
; CHECK-P10-LE: # %bb.0: # %entry
-; CHECK-P10-LE-NEXT: pli r4, 99999000
-; CHECK-P10-LE-NEXT: lhax r3, r3, r4
+; CHECK-P10-LE-NEXT: plha r3, 99999000(r3), 0
; CHECK-P10-LE-NEXT: blr
;
; CHECK-P10-BE-LABEL: ld_align32_int16_t_uint64_t:
; CHECK-P10-BE: # %bb.0: # %entry
-; CHECK-P10-BE-NEXT: pli r4, 99999006
-; CHECK-P10-BE-NEXT: lhax r3, r3, r4
+; CHECK-P10-BE-NEXT: plha r3, 99999006(r3), 0
; CHECK-P10-BE-NEXT: blr
;
; CHECK-P9-LE-LABEL: ld_align32_int16_t_uint64_t:
@@ -1393,16 +1383,14 @@ define dso_local signext i16 @ld_disjoint_align32_int16_t_uint64_t(i64 %ptr) {
; CHECK-P10-LE: # %bb.0: # %entry
; CHECK-P10-LE-NEXT: lis r4, -15264
; CHECK-P10-LE-NEXT: and r3, r3, r4
-; CHECK-P10-LE-NEXT: pli r4, 999990000
-; CHECK-P10-LE-NEXT: lhax r3, r3, r4
+; CHECK-P10-LE-NEXT: plha r3, 999990000(r3), 0
; CHECK-P10-LE-NEXT: blr
;
; CHECK-P10-BE-LABEL: ld_disjoint_align32_int16_t_uint64_t:
; CHECK-P10-BE: # %bb.0: # %entry
; CHECK-P10-BE-NEXT: lis r4, -15264
; CHECK-P10-BE-NEXT: and r3, r3, r4
-; CHECK-P10-BE-NEXT: pli r4, 999990006
-; CHECK-P10-BE-NEXT: lhax r3, r3, r4
+; CHECK-P10-BE-NEXT: plha r3, 999990006(r3), 0
; CHECK-P10-BE-NEXT: blr
;
; CHECK-P9-LE-LABEL: ld_disjoint_align32_int16_t_uint64_t:
@@ -1710,8 +1698,7 @@ entry:
define dso_local signext i16 @ld_align32_int16_t_float(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_int16_t_float:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lfsx f0, r3, r4
+; CHECK-P10-NEXT: plfs f0, 99999000(r3), 0
; CHECK-P10-NEXT: xscvdpsxws f0, f0
; CHECK-P10-NEXT: mffprwz r3, f0
; CHECK-P10-NEXT: extsw r3, r3
@@ -1862,8 +1849,7 @@ define dso_local signext i16 @ld_disjoint_align32_int16_t_float(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lfsx f0, r3, r4
+; CHECK-P10-NEXT: plfs f0, 999990000(r3), 0
; CHECK-P10-NEXT: xscvdpsxws f0, f0
; CHECK-P10-NEXT: mffprwz r3, f0
; CHECK-P10-NEXT: extsw r3, r3
@@ -2065,8 +2051,7 @@ entry:
define dso_local signext i16 @ld_align32_int16_t_double(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_int16_t_double:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lfdx f0, r3, r4
+; CHECK-P10-NEXT: plfd f0, 99999000(r3), 0
; CHECK-P10-NEXT: xscvdpsxws f0, f0
; CHECK-P10-NEXT: mffprwz r3, f0
; CHECK-P10-NEXT: extsw r3, r3
@@ -2217,8 +2202,7 @@ define dso_local signext i16 @ld_disjoint_align32_int16_t_double(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lfdx f0, r3, r4
+; CHECK-P10-NEXT: plfd f0, 999990000(r3), 0
; CHECK-P10-NEXT: xscvdpsxws f0, f0
; CHECK-P10-NEXT: mffprwz r3, f0
; CHECK-P10-NEXT: extsw r3, r3
@@ -2412,8 +2396,7 @@ entry:
define dso_local zeroext i16 @ld_align32_uint16_t_uint8_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_uint16_t_uint8_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align32_uint16_t_uint8_t:
@@ -2534,8 +2517,7 @@ define dso_local zeroext i16 @ld_disjoint_align32_uint16_t_uint8_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_uint16_t_uint8_t:
@@ -2700,8 +2682,7 @@ entry:
define dso_local zeroext i16 @ld_align32_uint16_t_int8_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_uint16_t_int8_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 99999000(r3), 0
; CHECK-P10-NEXT: extsb r3, r3
; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
@@ -2840,8 +2821,7 @@ define dso_local zeroext i16 @ld_disjoint_align32_uint16_t_int8_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 999990000(r3), 0
; CHECK-P10-NEXT: extsb r3, r3
; CHECK-P10-NEXT: clrldi r3, r3, 48
; CHECK-P10-NEXT: blr
@@ -3023,8 +3003,7 @@ entry:
define dso_local zeroext i16 @ld_align32_uint16_t_uint16_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_uint16_t_uint16_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lhzx r3, r3, r4
+; CHECK-P10-NEXT: plhz r3, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align32_uint16_t_uint16_t:
@@ -3141,8 +3120,7 @@ define dso_local zeroext i16 @ld_disjoint_align32_uint16_t_uint16_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lhzx r3, r3, r4
+; CHECK-P10-NEXT: plhz r3, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_uint16_t_uint16_t:
@@ -3308,14 +3286,12 @@ entry:
define dso_local zeroext i16 @ld_align32_uint16_t_uint32_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LE-LABEL: ld_align32_uint16_t_uint32_t:
; CHECK-P10-LE: # %bb.0: # %entry
-; CHECK-P10-LE-NEXT: pli r4, 99999000
-; CHECK-P10-LE-NEXT: lhzx r3, r3, r4
+; CHECK-P10-LE-NEXT: plhz r3, 99999000(r3), 0
; CHECK-P10-LE-NEXT: blr
;
; CHECK-P10-BE-LABEL: ld_align32_uint16_t_uint32_t:
; CHECK-P10-BE: # %bb.0: # %entry
-; CHECK-P10-BE-NEXT: pli r4, 99999002
-; CHECK-P10-BE-NEXT: lhzx r3, r3, r4
+; CHECK-P10-BE-NEXT: plhz r3, 99999002(r3), 0
; CHECK-P10-BE-NEXT: blr
;
; CHECK-P9-LE-LABEL: ld_align32_uint16_t_uint32_t:
@@ -3525,16 +3501,14 @@ define dso_local zeroext i16 @ld_disjoint_align32_uint16_t_uint32_t(i64 %ptr) {
; CHECK-P10-LE: # %bb.0: # %entry
; CHECK-P10-LE-NEXT: lis r4, -15264
; CHECK-P10-LE-NEXT: and r3, r3, r4
-; CHECK-P10-LE-NEXT: pli r4, 999990000
-; CHECK-P10-LE-NEXT: lhzx r3, r3, r4
+; CHECK-P10-LE-NEXT: plhz r3, 999990000(r3), 0
; CHECK-P10-LE-NEXT: blr
;
; CHECK-P10-BE-LABEL: ld_disjoint_align32_uint16_t_uint32_t:
; CHECK-P10-BE: # %bb.0: # %entry
; CHECK-P10-BE-NEXT: lis r4, -15264
; CHECK-P10-BE-NEXT: and r3, r3, r4
-; CHECK-P10-BE-NEXT: pli r4, 999990002
-; CHECK-P10-BE-NEXT: lhzx r3, r3, r4
+; CHECK-P10-BE-NEXT: plhz r3, 999990002(r3), 0
; CHECK-P10-BE-NEXT: blr
;
; CHECK-P9-LE-LABEL: ld_disjoint_align32_uint16_t_uint32_t:
@@ -3846,14 +3820,12 @@ entry:
define dso_local zeroext i16 @ld_align32_uint16_t_uint64_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LE-LABEL: ld_align32_uint16_t_uint64_t:
; CHECK-P10-LE: # %bb.0: # %entry
-; CHECK-P10-LE-NEXT: pli r4, 99999000
-; CHECK-P10-LE-NEXT: lhzx r3, r3, r4
+; CHECK-P10-LE-NEXT: plhz r3, 99999000(r3), 0
; CHECK-P10-LE-NEXT: blr
;
; CHECK-P10-BE-LABEL: ld_align32_uint16_t_uint64_t:
; CHECK-P10-BE: # %bb.0: # %entry
-; CHECK-P10-BE-NEXT: pli r4, 99999006
-; CHECK-P10-BE-NEXT: lhzx r3, r3, r4
+; CHECK-P10-BE-NEXT: plhz r3, 99999006(r3), 0
; CHECK-P10-BE-NEXT: blr
;
; CHECK-P9-LE-LABEL: ld_align32_uint16_t_uint64_t:
@@ -4063,16 +4035,14 @@ define dso_local zeroext i16 @ld_disjoint_align32_uint16_t_uint64_t(i64 %ptr) {
; CHECK-P10-LE: # %bb.0: # %entry
; CHECK-P10-LE-NEXT: lis r4, -15264
; CHECK-P10-LE-NEXT: and r3, r3, r4
-; CHECK-P10-LE-NEXT: pli r4, 999990000
-; CHECK-P10-LE-NEXT: lhzx r3, r3, r4
+; CHECK-P10-LE-NEXT: plhz r3, 999990000(r3), 0
; CHECK-P10-LE-NEXT: blr
;
; CHECK-P10-BE-LABEL: ld_disjoint_align32_uint16_t_uint64_t:
; CHECK-P10-BE: # %bb.0: # %entry
; CHECK-P10-BE-NEXT: lis r4, -15264
; CHECK-P10-BE-NEXT: and r3, r3, r4
-; CHECK-P10-BE-NEXT: pli r4, 999990006
-; CHECK-P10-BE-NEXT: lhzx r3, r3, r4
+; CHECK-P10-BE-NEXT: plhz r3, 999990006(r3), 0
; CHECK-P10-BE-NEXT: blr
;
; CHECK-P9-LE-LABEL: ld_disjoint_align32_uint16_t_uint64_t:
@@ -4364,8 +4334,7 @@ entry:
define dso_local zeroext i16 @ld_align32_uint16_t_float(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_uint16_t_float:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lfsx f0, r3, r4
+; CHECK-P10-NEXT: plfs f0, 99999000(r3), 0
; CHECK-P10-NEXT: xscvdpsxws f0, f0
; CHECK-P10-NEXT: mffprwz r3, f0
; CHECK-P10-NEXT: clrldi r3, r3, 32
@@ -4516,8 +4485,7 @@ define dso_local zeroext i16 @ld_disjoint_align32_uint16_t_float(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lfsx f0, r3, r4
+; CHECK-P10-NEXT: plfs f0, 999990000(r3), 0
; CHECK-P10-NEXT: xscvdpsxws f0, f0
; CHECK-P10-NEXT: mffprwz r3, f0
; CHECK-P10-NEXT: clrldi r3, r3, 32
@@ -4718,8 +4686,7 @@ entry:
define dso_local zeroext i16 @ld_align32_uint16_t_double(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_uint16_t_double:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lfdx f0, r3, r4
+; CHECK-P10-NEXT: plfd f0, 99999000(r3), 0
; CHECK-P10-NEXT: xscvdpsxws f0, f0
; CHECK-P10-NEXT: mffprwz r3, f0
; CHECK-P10-NEXT: clrldi r3, r3, 32
@@ -4870,8 +4837,7 @@ define dso_local zeroext i16 @ld_disjoint_align32_uint16_t_double(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lfdx f0, r3, r4
+; CHECK-P10-NEXT: plfd f0, 999990000(r3), 0
; CHECK-P10-NEXT: xscvdpsxws f0, f0
; CHECK-P10-NEXT: mffprwz r3, f0
; CHECK-P10-NEXT: clrldi r3, r3, 32
@@ -5065,8 +5031,7 @@ entry:
define dso_local void @st_align32_uint16_t_uint8_t(i8* nocapture %ptr, i16 zeroext %str) {
; CHECK-P10-LABEL: st_align32_uint16_t_uint8_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r5, 99999000
-; CHECK-P10-NEXT: stbx r4, r3, r5
+; CHECK-P10-NEXT: pstb r4, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_uint16_t_uint8_t:
@@ -5187,8 +5152,7 @@ define dso_local void @st_disjoint_align32_uint16_t_uint8_t(i64 %ptr, i16 zeroex
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r5, -15264
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: pli r5, 999990000
-; CHECK-P10-NEXT: stbx r4, r3, r5
+; CHECK-P10-NEXT: pstb r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint16_t_uint8_t:
@@ -5348,8 +5312,7 @@ entry:
define dso_local void @st_align32_uint16_t_uint16_t(i8* nocapture %ptr, i16 zeroext %str) {
; CHECK-P10-LABEL: st_align32_uint16_t_uint16_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r5, 99999000
-; CHECK-P10-NEXT: sthx r4, r3, r5
+; CHECK-P10-NEXT: psth r4, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_uint16_t_uint16_t:
@@ -5466,8 +5429,7 @@ define dso_local void @st_disjoint_align32_uint16_t_uint16_t(i64 %ptr, i16 zeroe
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r5, -15264
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: pli r5, 999990000
-; CHECK-P10-NEXT: sthx r4, r3, r5
+; CHECK-P10-NEXT: psth r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint16_t_uint16_t:
@@ -5623,8 +5585,7 @@ entry:
define dso_local void @st_align32_uint16_t_uint32_t(i8* nocapture %ptr, i16 zeroext %str) {
; CHECK-P10-LABEL: st_align32_uint16_t_uint32_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r5, 99999000
-; CHECK-P10-NEXT: stwx r4, r3, r5
+; CHECK-P10-NEXT: pstw r4, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_uint16_t_uint32_t:
@@ -5748,8 +5709,7 @@ define dso_local void @st_disjoint_align32_uint16_t_uint32_t(i64 %ptr, i16 zeroe
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r5, -15264
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: pli r5, 999990000
-; CHECK-P10-NEXT: stwx r4, r3, r5
+; CHECK-P10-NEXT: pstw r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint16_t_uint32_t:
@@ -5911,8 +5871,7 @@ entry:
define dso_local void @st_align32_uint16_t_uint64_t(i8* nocapture %ptr, i16 zeroext %str) {
; CHECK-P10-LABEL: st_align32_uint16_t_uint64_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r5, 99999000
-; CHECK-P10-NEXT: stdx r4, r3, r5
+; CHECK-P10-NEXT: pstd r4, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_uint16_t_uint64_t:
@@ -6036,8 +5995,7 @@ define dso_local void @st_disjoint_align32_uint16_t_uint64_t(i64 %ptr, i16 zeroe
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r5, -15264
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: pli r5, 999990000
-; CHECK-P10-NEXT: stdx r4, r3, r5
+; CHECK-P10-NEXT: pstd r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint16_t_uint64_t:
@@ -6204,9 +6162,8 @@ define dso_local void @st_align32_uint16_t_float(i8* nocapture %ptr, i16 zeroext
; CHECK-P10-LABEL: st_align32_uint16_t_float:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: mtfprwz f0, r4
-; CHECK-P10-NEXT: pli r4, 99999000
; CHECK-P10-NEXT: xscvuxdsp f0, f0
-; CHECK-P10-NEXT: stfsx f0, r3, r4
+; CHECK-P10-NEXT: pstfs f0, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_align32_uint16_t_float:
@@ -6383,10 +6340,9 @@ define dso_local void @st_disjoint_align32_uint16_t_float(i64 %ptr, i16 zeroext
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: mtfprwz f0, r4
; CHECK-P10-NEXT: lis r5, -15264
-; CHECK-P10-NEXT: pli r4, 999990000
; CHECK-P10-NEXT: xscvuxdsp f0, f0
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: stfsx f0, r3, r4
+; CHECK-P10-NEXT: pstfs f0, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint16_t_float:
@@ -6594,9 +6550,8 @@ define dso_local void @st_align32_uint16_t_double(i8* nocapture %ptr, i16 zeroex
; CHECK-P10-LABEL: st_align32_uint16_t_double:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: mtfprwz f0, r4
-; CHECK-P10-NEXT: pli r4, 99999000
; CHECK-P10-NEXT: xscvuxddp f0, f0
-; CHECK-P10-NEXT: stfdx f0, r3, r4
+; CHECK-P10-NEXT: pstfd f0, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_align32_uint16_t_double:
@@ -6773,10 +6728,9 @@ define dso_local void @st_disjoint_align32_uint16_t_double(i64 %ptr, i16 zeroext
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: mtfprwz f0, r4
; CHECK-P10-NEXT: lis r5, -15264
-; CHECK-P10-NEXT: pli r4, 999990000
; CHECK-P10-NEXT: xscvuxddp f0, f0
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: stfdx f0, r3, r4
+; CHECK-P10-NEXT: pstfd f0, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint16_t_double:
@@ -6979,8 +6933,7 @@ entry:
define dso_local void @st_align32_int16_t_uint32_t(i8* nocapture %ptr, i16 signext %str) {
; CHECK-P10-LABEL: st_align32_int16_t_uint32_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r5, 99999000
-; CHECK-P10-NEXT: stwx r4, r3, r5
+; CHECK-P10-NEXT: pstw r4, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_int16_t_uint32_t:
@@ -7104,8 +7057,7 @@ define dso_local void @st_disjoint_align32_int16_t_uint32_t(i64 %ptr, i16 signex
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r5, -15264
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: pli r5, 999990000
-; CHECK-P10-NEXT: stwx r4, r3, r5
+; CHECK-P10-NEXT: pstw r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_int16_t_uint32_t:
@@ -7267,8 +7219,7 @@ entry:
define dso_local void @st_align32_int16_t_uint64_t(i8* nocapture %ptr, i16 signext %str) {
; CHECK-P10-LABEL: st_align32_int16_t_uint64_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r5, 99999000
-; CHECK-P10-NEXT: stdx r4, r3, r5
+; CHECK-P10-NEXT: pstd r4, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_int16_t_uint64_t:
@@ -7392,8 +7343,7 @@ define dso_local void @st_disjoint_align32_int16_t_uint64_t(i64 %ptr, i16 signex
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r5, -15264
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: pli r5, 999990000
-; CHECK-P10-NEXT: stdx r4, r3, r5
+; CHECK-P10-NEXT: pstd r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_int16_t_uint64_t:
@@ -7560,9 +7510,8 @@ define dso_local void @st_align32_int16_t_float(i8* nocapture %ptr, i16 signext
; CHECK-P10-LABEL: st_align32_int16_t_float:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: mtfprwa f0, r4
-; CHECK-P10-NEXT: pli r4, 99999000
; CHECK-P10-NEXT: xscvsxdsp f0, f0
-; CHECK-P10-NEXT: stfsx f0, r3, r4
+; CHECK-P10-NEXT: pstfs f0, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_align32_int16_t_float:
@@ -7739,10 +7688,9 @@ define dso_local void @st_disjoint_align32_int16_t_float(i64 %ptr, i16 signext %
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: mtfprwa f0, r4
; CHECK-P10-NEXT: lis r5, -15264
-; CHECK-P10-NEXT: pli r4, 999990000
; CHECK-P10-NEXT: xscvsxdsp f0, f0
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: stfsx f0, r3, r4
+; CHECK-P10-NEXT: pstfs f0, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_int16_t_float:
@@ -7951,9 +7899,8 @@ define dso_local void @st_align32_int16_t_double(i8* nocapture %ptr, i16 signext
; CHECK-P10-LABEL: st_align32_int16_t_double:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: mtfprwa f0, r4
-; CHECK-P10-NEXT: pli r4, 99999000
; CHECK-P10-NEXT: xscvsxddp f0, f0
-; CHECK-P10-NEXT: stfdx f0, r3, r4
+; CHECK-P10-NEXT: pstfd f0, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_align32_int16_t_double:
@@ -8130,10 +8077,9 @@ define dso_local void @st_disjoint_align32_int16_t_double(i64 %ptr, i16 signext
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: mtfprwa f0, r4
; CHECK-P10-NEXT: lis r5, -15264
-; CHECK-P10-NEXT: pli r4, 999990000
; CHECK-P10-NEXT: xscvsxddp f0, f0
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: stfdx f0, r3, r4
+; CHECK-P10-NEXT: pstfd f0, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_int16_t_double:
diff --git a/llvm/test/CodeGen/PowerPC/scalar-i32-ldst.ll b/llvm/test/CodeGen/PowerPC/scalar-i32-ldst.ll
index 0ec7db16837a9..bbab8a76627f2 100644
--- a/llvm/test/CodeGen/PowerPC/scalar-i32-ldst.ll
+++ b/llvm/test/CodeGen/PowerPC/scalar-i32-ldst.ll
@@ -50,8 +50,7 @@ entry:
define dso_local signext i32 @ld_align32_int32_t_int8_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_int32_t_int8_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 99999000(r3), 0
; CHECK-P10-NEXT: extsb r3, r3
; CHECK-P10-NEXT: blr
;
@@ -199,8 +198,7 @@ define dso_local signext i32 @ld_disjoint_align32_int32_t_int8_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 999990000(r3), 0
; CHECK-P10-NEXT: extsb r3, r3
; CHECK-P10-NEXT: blr
;
@@ -373,8 +371,7 @@ entry:
define dso_local signext i32 @ld_align32_int32_t_int16_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_int32_t_int16_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lhax r3, r3, r4
+; CHECK-P10-NEXT: plha r3, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align32_int32_t_int16_t:
@@ -515,8 +512,7 @@ define dso_local signext i32 @ld_disjoint_align32_int32_t_int16_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lhax r3, r3, r4
+; CHECK-P10-NEXT: plha r3, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_int32_t_int16_t:
@@ -676,8 +672,7 @@ entry:
define dso_local signext i32 @ld_align32_int32_t_uint32_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_int32_t_uint32_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lwax r3, r3, r4
+; CHECK-P10-NEXT: plwa r3, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align32_int32_t_uint32_t:
@@ -779,8 +774,7 @@ define dso_local signext i32 @ld_disjoint_unalign16_int32_t_uint32_t(i64 %ptr) {
; CHECK-P10-LABEL: ld_disjoint_unalign16_int32_t_uint32_t:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: li r4, 6
-; CHECK-P10-NEXT: lwax r3, r3, r4
+; CHECK-P10-NEXT: plwa r3, 6(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_unalign16_int32_t_uint32_t:
@@ -840,8 +834,7 @@ define dso_local signext i32 @ld_disjoint_align32_int32_t_uint32_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lwax r3, r3, r4
+; CHECK-P10-NEXT: plwa r3, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_int32_t_uint32_t:
@@ -986,17 +979,39 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local signext i32 @ld_unalign16_int32_t_uint64_t(i8* nocapture readonly %ptr) {
-; CHECK-LE-LABEL: ld_unalign16_int32_t_uint64_t:
-; CHECK-LE: # %bb.0: # %entry
-; CHECK-LE-NEXT: li r4, 1
-; CHECK-LE-NEXT: lwax r3, r3, r4
-; CHECK-LE-NEXT: blr
+; CHECK-P10-LE-LABEL: ld_unalign16_int32_t_uint64_t:
+; CHECK-P10-LE: # %bb.0: # %entry
+; CHECK-P10-LE-NEXT: plwa r3, 1(r3), 0
+; CHECK-P10-LE-NEXT: blr
;
-; CHECK-BE-LABEL: ld_unalign16_int32_t_uint64_t:
-; CHECK-BE: # %bb.0: # %entry
-; CHECK-BE-NEXT: li r4, 5
-; CHECK-BE-NEXT: lwax r3, r3, r4
-; CHECK-BE-NEXT: blr
+; CHECK-P10-BE-LABEL: ld_unalign16_int32_t_uint64_t:
+; CHECK-P10-BE: # %bb.0: # %entry
+; CHECK-P10-BE-NEXT: plwa r3, 5(r3), 0
+; CHECK-P10-BE-NEXT: blr
+;
+; CHECK-P9-LE-LABEL: ld_unalign16_int32_t_uint64_t:
+; CHECK-P9-LE: # %bb.0: # %entry
+; CHECK-P9-LE-NEXT: li r4, 1
+; CHECK-P9-LE-NEXT: lwax r3, r3, r4
+; CHECK-P9-LE-NEXT: blr
+;
+; CHECK-P9-BE-LABEL: ld_unalign16_int32_t_uint64_t:
+; CHECK-P9-BE: # %bb.0: # %entry
+; CHECK-P9-BE-NEXT: li r4, 5
+; CHECK-P9-BE-NEXT: lwax r3, r3, r4
+; CHECK-P9-BE-NEXT: blr
+;
+; CHECK-P8-LE-LABEL: ld_unalign16_int32_t_uint64_t:
+; CHECK-P8-LE: # %bb.0: # %entry
+; CHECK-P8-LE-NEXT: li r4, 1
+; CHECK-P8-LE-NEXT: lwax r3, r3, r4
+; CHECK-P8-LE-NEXT: blr
+;
+; CHECK-P8-BE-LABEL: ld_unalign16_int32_t_uint64_t:
+; CHECK-P8-BE: # %bb.0: # %entry
+; CHECK-P8-BE-NEXT: li r4, 5
+; CHECK-P8-BE-NEXT: lwax r3, r3, r4
+; CHECK-P8-BE-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1
%0 = bitcast i8* %add.ptr to i64*
@@ -1028,14 +1043,12 @@ entry:
define dso_local signext i32 @ld_align32_int32_t_uint64_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LE-LABEL: ld_align32_int32_t_uint64_t:
; CHECK-P10-LE: # %bb.0: # %entry
-; CHECK-P10-LE-NEXT: pli r4, 99999000
-; CHECK-P10-LE-NEXT: lwax r3, r3, r4
+; CHECK-P10-LE-NEXT: plwa r3, 99999000(r3), 0
; CHECK-P10-LE-NEXT: blr
;
; CHECK-P10-BE-LABEL: ld_align32_int32_t_uint64_t:
; CHECK-P10-BE: # %bb.0: # %entry
-; CHECK-P10-BE-NEXT: pli r4, 99999004
-; CHECK-P10-BE-NEXT: lwax r3, r3, r4
+; CHECK-P10-BE-NEXT: plwa r3, 99999004(r3), 0
; CHECK-P10-BE-NEXT: blr
;
; CHECK-P9-LE-LABEL: ld_align32_int32_t_uint64_t:
@@ -1223,15 +1236,13 @@ define dso_local signext i32 @ld_disjoint_unalign16_int32_t_uint64_t(i64 %ptr) {
; CHECK-P10-LE-LABEL: ld_disjoint_unalign16_int32_t_uint64_t:
; CHECK-P10-LE: # %bb.0: # %entry
; CHECK-P10-LE-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-LE-NEXT: li r4, 6
-; CHECK-P10-LE-NEXT: lwax r3, r3, r4
+; CHECK-P10-LE-NEXT: plwa r3, 6(r3), 0
; CHECK-P10-LE-NEXT: blr
;
; CHECK-P10-BE-LABEL: ld_disjoint_unalign16_int32_t_uint64_t:
; CHECK-P10-BE: # %bb.0: # %entry
; CHECK-P10-BE-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-BE-NEXT: li r4, 10
-; CHECK-P10-BE-NEXT: lwax r3, r3, r4
+; CHECK-P10-BE-NEXT: plwa r3, 10(r3), 0
; CHECK-P10-BE-NEXT: blr
;
; CHECK-P9-LE-LABEL: ld_disjoint_unalign16_int32_t_uint64_t:
@@ -1321,16 +1332,14 @@ define dso_local signext i32 @ld_disjoint_align32_int32_t_uint64_t(i64 %ptr) {
; CHECK-P10-LE: # %bb.0: # %entry
; CHECK-P10-LE-NEXT: lis r4, -15264
; CHECK-P10-LE-NEXT: and r3, r3, r4
-; CHECK-P10-LE-NEXT: pli r4, 999990000
-; CHECK-P10-LE-NEXT: lwax r3, r3, r4
+; CHECK-P10-LE-NEXT: plwa r3, 999990000(r3), 0
; CHECK-P10-LE-NEXT: blr
;
; CHECK-P10-BE-LABEL: ld_disjoint_align32_int32_t_uint64_t:
; CHECK-P10-BE: # %bb.0: # %entry
; CHECK-P10-BE-NEXT: lis r4, -15264
; CHECK-P10-BE-NEXT: and r3, r3, r4
-; CHECK-P10-BE-NEXT: pli r4, 999990004
-; CHECK-P10-BE-NEXT: lwax r3, r3, r4
+; CHECK-P10-BE-NEXT: plwa r3, 999990004(r3), 0
; CHECK-P10-BE-NEXT: blr
;
; CHECK-P9-LE-LABEL: ld_disjoint_align32_int32_t_uint64_t:
@@ -1638,8 +1647,7 @@ entry:
define dso_local signext i32 @ld_align32_int32_t_float(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_int32_t_float:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lfsx f0, r3, r4
+; CHECK-P10-NEXT: plfs f0, 99999000(r3), 0
; CHECK-P10-NEXT: xscvdpsxws f0, f0
; CHECK-P10-NEXT: mffprwz r3, f0
; CHECK-P10-NEXT: extsw r3, r3
@@ -1810,8 +1818,7 @@ define dso_local signext i32 @ld_disjoint_align32_int32_t_float(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lfsx f0, r3, r4
+; CHECK-P10-NEXT: plfs f0, 999990000(r3), 0
; CHECK-P10-NEXT: xscvdpsxws f0, f0
; CHECK-P10-NEXT: mffprwz r3, f0
; CHECK-P10-NEXT: extsw r3, r3
@@ -2012,8 +2019,7 @@ entry:
define dso_local signext i32 @ld_align32_int32_t_double(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_int32_t_double:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lfdx f0, r3, r4
+; CHECK-P10-NEXT: plfd f0, 99999000(r3), 0
; CHECK-P10-NEXT: xscvdpsxws f0, f0
; CHECK-P10-NEXT: mffprwz r3, f0
; CHECK-P10-NEXT: extsw r3, r3
@@ -2184,8 +2190,7 @@ define dso_local signext i32 @ld_disjoint_align32_int32_t_double(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lfdx f0, r3, r4
+; CHECK-P10-NEXT: plfd f0, 999990000(r3), 0
; CHECK-P10-NEXT: xscvdpsxws f0, f0
; CHECK-P10-NEXT: mffprwz r3, f0
; CHECK-P10-NEXT: extsw r3, r3
@@ -2379,8 +2384,7 @@ entry:
define dso_local zeroext i32 @ld_align32_uint32_t_uint8_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_uint32_t_uint8_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align32_uint32_t_uint8_t:
@@ -2501,8 +2505,7 @@ define dso_local zeroext i32 @ld_disjoint_align32_uint32_t_uint8_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_uint32_t_uint8_t:
@@ -2667,8 +2670,7 @@ entry:
define dso_local zeroext i32 @ld_align32_uint32_t_int8_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_uint32_t_int8_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 99999000(r3), 0
; CHECK-P10-NEXT: extsb r3, r3
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
@@ -2807,8 +2809,7 @@ define dso_local zeroext i32 @ld_disjoint_align32_uint32_t_int8_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 999990000(r3), 0
; CHECK-P10-NEXT: extsb r3, r3
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
@@ -2992,8 +2993,7 @@ entry:
define dso_local zeroext i32 @ld_align32_uint32_t_uint16_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_uint32_t_uint16_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lhzx r3, r3, r4
+; CHECK-P10-NEXT: plhz r3, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align32_uint32_t_uint16_t:
@@ -3117,8 +3117,7 @@ define dso_local zeroext i32 @ld_disjoint_align32_uint32_t_uint16_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lhzx r3, r3, r4
+; CHECK-P10-NEXT: plhz r3, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_uint32_t_uint16_t:
@@ -3282,8 +3281,7 @@ entry:
define dso_local zeroext i32 @ld_align32_uint32_t_int16_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_uint32_t_int16_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lhax r3, r3, r4
+; CHECK-P10-NEXT: plha r3, 99999000(r3), 0
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
@@ -3416,8 +3414,7 @@ define dso_local zeroext i32 @ld_disjoint_align32_uint32_t_int16_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lhax r3, r3, r4
+; CHECK-P10-NEXT: plha r3, 999990000(r3), 0
; CHECK-P10-NEXT: clrldi r3, r3, 32
; CHECK-P10-NEXT: blr
;
@@ -3588,8 +3585,7 @@ entry:
define dso_local zeroext i32 @ld_align32_uint32_t_uint32_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_uint32_t_uint32_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lwzx r3, r3, r4
+; CHECK-P10-NEXT: plwz r3, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align32_uint32_t_uint32_t:
@@ -3706,8 +3702,7 @@ define dso_local zeroext i32 @ld_disjoint_align32_uint32_t_uint32_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lwzx r3, r3, r4
+; CHECK-P10-NEXT: plwz r3, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_uint32_t_uint32_t:
@@ -3873,14 +3868,12 @@ entry:
define dso_local zeroext i32 @ld_align32_uint32_t_uint64_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LE-LABEL: ld_align32_uint32_t_uint64_t:
; CHECK-P10-LE: # %bb.0: # %entry
-; CHECK-P10-LE-NEXT: pli r4, 99999000
-; CHECK-P10-LE-NEXT: lwzx r3, r3, r4
+; CHECK-P10-LE-NEXT: plwz r3, 99999000(r3), 0
; CHECK-P10-LE-NEXT: blr
;
; CHECK-P10-BE-LABEL: ld_align32_uint32_t_uint64_t:
; CHECK-P10-BE: # %bb.0: # %entry
-; CHECK-P10-BE-NEXT: pli r4, 99999004
-; CHECK-P10-BE-NEXT: lwzx r3, r3, r4
+; CHECK-P10-BE-NEXT: plwz r3, 99999004(r3), 0
; CHECK-P10-BE-NEXT: blr
;
; CHECK-P9-LE-LABEL: ld_align32_uint32_t_uint64_t:
@@ -4090,16 +4083,14 @@ define dso_local zeroext i32 @ld_disjoint_align32_uint32_t_uint64_t(i64 %ptr) {
; CHECK-P10-LE: # %bb.0: # %entry
; CHECK-P10-LE-NEXT: lis r4, -15264
; CHECK-P10-LE-NEXT: and r3, r3, r4
-; CHECK-P10-LE-NEXT: pli r4, 999990000
-; CHECK-P10-LE-NEXT: lwzx r3, r3, r4
+; CHECK-P10-LE-NEXT: plwz r3, 999990000(r3), 0
; CHECK-P10-LE-NEXT: blr
;
; CHECK-P10-BE-LABEL: ld_disjoint_align32_uint32_t_uint64_t:
; CHECK-P10-BE: # %bb.0: # %entry
; CHECK-P10-BE-NEXT: lis r4, -15264
; CHECK-P10-BE-NEXT: and r3, r3, r4
-; CHECK-P10-BE-NEXT: pli r4, 999990004
-; CHECK-P10-BE-NEXT: lwzx r3, r3, r4
+; CHECK-P10-BE-NEXT: plwz r3, 999990004(r3), 0
; CHECK-P10-BE-NEXT: blr
;
; CHECK-P9-LE-LABEL: ld_disjoint_align32_uint32_t_uint64_t:
@@ -4407,8 +4398,7 @@ entry:
define dso_local zeroext i32 @ld_align32_uint32_t_float(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_uint32_t_float:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lfsx f0, r3, r4
+; CHECK-P10-NEXT: plfs f0, 99999000(r3), 0
; CHECK-P10-NEXT: xscvdpuxws f0, f0
; CHECK-P10-NEXT: mffprwz r3, f0
; CHECK-P10-NEXT: clrldi r3, r3, 32
@@ -4559,8 +4549,7 @@ define dso_local zeroext i32 @ld_disjoint_align32_uint32_t_float(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lfsx f0, r3, r4
+; CHECK-P10-NEXT: plfs f0, 999990000(r3), 0
; CHECK-P10-NEXT: xscvdpuxws f0, f0
; CHECK-P10-NEXT: mffprwz r3, f0
; CHECK-P10-NEXT: clrldi r3, r3, 32
@@ -4761,8 +4750,7 @@ entry:
define dso_local zeroext i32 @ld_align32_uint32_t_double(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_uint32_t_double:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lfdx f0, r3, r4
+; CHECK-P10-NEXT: plfd f0, 99999000(r3), 0
; CHECK-P10-NEXT: xscvdpuxws f0, f0
; CHECK-P10-NEXT: mffprwz r3, f0
; CHECK-P10-NEXT: clrldi r3, r3, 32
@@ -4913,8 +4901,7 @@ define dso_local zeroext i32 @ld_disjoint_align32_uint32_t_double(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lfdx f0, r3, r4
+; CHECK-P10-NEXT: plfd f0, 999990000(r3), 0
; CHECK-P10-NEXT: xscvdpuxws f0, f0
; CHECK-P10-NEXT: mffprwz r3, f0
; CHECK-P10-NEXT: clrldi r3, r3, 32
@@ -5108,8 +5095,7 @@ entry:
define dso_local void @st_align32_uint32_t_uint8_t(i8* nocapture %ptr, i32 zeroext %str) {
; CHECK-P10-LABEL: st_align32_uint32_t_uint8_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r5, 99999000
-; CHECK-P10-NEXT: stbx r4, r3, r5
+; CHECK-P10-NEXT: pstb r4, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_uint32_t_uint8_t:
@@ -5230,8 +5216,7 @@ define dso_local void @st_disjoint_align32_uint32_t_uint8_t(i64 %ptr, i32 zeroex
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r5, -15264
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: pli r5, 999990000
-; CHECK-P10-NEXT: stbx r4, r3, r5
+; CHECK-P10-NEXT: pstb r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint32_t_uint8_t:
@@ -5393,8 +5378,7 @@ entry:
define dso_local void @st_align32_uint32_t_uint16_t(i8* nocapture %ptr, i32 zeroext %str) {
; CHECK-P10-LABEL: st_align32_uint32_t_uint16_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r5, 99999000
-; CHECK-P10-NEXT: sthx r4, r3, r5
+; CHECK-P10-NEXT: psth r4, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_uint32_t_uint16_t:
@@ -5518,8 +5502,7 @@ define dso_local void @st_disjoint_align32_uint32_t_uint16_t(i64 %ptr, i32 zeroe
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r5, -15264
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: pli r5, 999990000
-; CHECK-P10-NEXT: sthx r4, r3, r5
+; CHECK-P10-NEXT: psth r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint32_t_uint16_t:
@@ -5679,8 +5662,7 @@ entry:
define dso_local void @st_align32_uint32_t_uint32_t(i8* nocapture %ptr, i32 zeroext %str) {
; CHECK-P10-LABEL: st_align32_uint32_t_uint32_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r5, 99999000
-; CHECK-P10-NEXT: stwx r4, r3, r5
+; CHECK-P10-NEXT: pstw r4, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_uint32_t_uint32_t:
@@ -5797,8 +5779,7 @@ define dso_local void @st_disjoint_align32_uint32_t_uint32_t(i64 %ptr, i32 zeroe
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r5, -15264
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: pli r5, 999990000
-; CHECK-P10-NEXT: stwx r4, r3, r5
+; CHECK-P10-NEXT: pstw r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint32_t_uint32_t:
@@ -5954,8 +5935,7 @@ entry:
define dso_local void @st_align32_uint32_t_uint64_t(i8* nocapture %ptr, i32 zeroext %str) {
; CHECK-P10-LABEL: st_align32_uint32_t_uint64_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r5, 99999000
-; CHECK-P10-NEXT: stdx r4, r3, r5
+; CHECK-P10-NEXT: pstd r4, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_uint32_t_uint64_t:
@@ -6079,8 +6059,7 @@ define dso_local void @st_disjoint_align32_uint32_t_uint64_t(i64 %ptr, i32 zeroe
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r5, -15264
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: pli r5, 999990000
-; CHECK-P10-NEXT: stdx r4, r3, r5
+; CHECK-P10-NEXT: pstd r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint32_t_uint64_t:
@@ -6247,9 +6226,8 @@ define dso_local void @st_align32_uint32_t_float(i8* nocapture %ptr, i32 zeroext
; CHECK-P10-LABEL: st_align32_uint32_t_float:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: mtfprwz f0, r4
-; CHECK-P10-NEXT: pli r4, 99999000
; CHECK-P10-NEXT: xscvuxdsp f0, f0
-; CHECK-P10-NEXT: stfsx f0, r3, r4
+; CHECK-P10-NEXT: pstfs f0, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_align32_uint32_t_float:
@@ -6426,10 +6404,9 @@ define dso_local void @st_disjoint_align32_uint32_t_float(i64 %ptr, i32 zeroext
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: mtfprwz f0, r4
; CHECK-P10-NEXT: lis r5, -15264
-; CHECK-P10-NEXT: pli r4, 999990000
; CHECK-P10-NEXT: xscvuxdsp f0, f0
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: stfsx f0, r3, r4
+; CHECK-P10-NEXT: pstfs f0, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint32_t_float:
@@ -6637,9 +6614,8 @@ define dso_local void @st_align32_uint32_t_double(i8* nocapture %ptr, i32 zeroex
; CHECK-P10-LABEL: st_align32_uint32_t_double:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: mtfprwz f0, r4
-; CHECK-P10-NEXT: pli r4, 99999000
; CHECK-P10-NEXT: xscvuxddp f0, f0
-; CHECK-P10-NEXT: stfdx f0, r3, r4
+; CHECK-P10-NEXT: pstfd f0, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_align32_uint32_t_double:
@@ -6816,10 +6792,9 @@ define dso_local void @st_disjoint_align32_uint32_t_double(i64 %ptr, i32 zeroext
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: mtfprwz f0, r4
; CHECK-P10-NEXT: lis r5, -15264
-; CHECK-P10-NEXT: pli r4, 999990000
; CHECK-P10-NEXT: xscvuxddp f0, f0
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: stfdx f0, r3, r4
+; CHECK-P10-NEXT: pstfd f0, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint32_t_double:
@@ -7022,8 +6997,7 @@ entry:
define dso_local void @st_align32_int32_t_uint64_t(i8* nocapture %ptr, i32 signext %str) {
; CHECK-P10-LABEL: st_align32_int32_t_uint64_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r5, 99999000
-; CHECK-P10-NEXT: stdx r4, r3, r5
+; CHECK-P10-NEXT: pstd r4, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_int32_t_uint64_t:
@@ -7147,8 +7121,7 @@ define dso_local void @st_disjoint_align32_int32_t_uint64_t(i64 %ptr, i32 signex
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r5, -15264
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: pli r5, 999990000
-; CHECK-P10-NEXT: stdx r4, r3, r5
+; CHECK-P10-NEXT: pstd r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_int32_t_uint64_t:
@@ -7315,9 +7288,8 @@ define dso_local void @st_align32_int32_t_float(i8* nocapture %ptr, i32 signext
; CHECK-P10-LABEL: st_align32_int32_t_float:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: mtfprwa f0, r4
-; CHECK-P10-NEXT: pli r4, 99999000
; CHECK-P10-NEXT: xscvsxdsp f0, f0
-; CHECK-P10-NEXT: stfsx f0, r3, r4
+; CHECK-P10-NEXT: pstfs f0, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_align32_int32_t_float:
@@ -7494,10 +7466,9 @@ define dso_local void @st_disjoint_align32_int32_t_float(i64 %ptr, i32 signext %
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: mtfprwa f0, r4
; CHECK-P10-NEXT: lis r5, -15264
-; CHECK-P10-NEXT: pli r4, 999990000
; CHECK-P10-NEXT: xscvsxdsp f0, f0
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: stfsx f0, r3, r4
+; CHECK-P10-NEXT: pstfs f0, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_int32_t_float:
@@ -7705,9 +7676,8 @@ define dso_local void @st_align32_int32_t_double(i8* nocapture %ptr, i32 signext
; CHECK-P10-LABEL: st_align32_int32_t_double:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: mtfprwa f0, r4
-; CHECK-P10-NEXT: pli r4, 99999000
; CHECK-P10-NEXT: xscvsxddp f0, f0
-; CHECK-P10-NEXT: stfdx f0, r3, r4
+; CHECK-P10-NEXT: pstfd f0, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_align32_int32_t_double:
@@ -7884,10 +7854,9 @@ define dso_local void @st_disjoint_align32_int32_t_double(i64 %ptr, i32 signext
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: mtfprwa f0, r4
; CHECK-P10-NEXT: lis r5, -15264
-; CHECK-P10-NEXT: pli r4, 999990000
; CHECK-P10-NEXT: xscvsxddp f0, f0
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: stfdx f0, r3, r4
+; CHECK-P10-NEXT: pstfd f0, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_int32_t_double:
diff --git a/llvm/test/CodeGen/PowerPC/scalar-i64-ldst.ll b/llvm/test/CodeGen/PowerPC/scalar-i64-ldst.ll
index e59e78c25146c..3577d714eef03 100644
--- a/llvm/test/CodeGen/PowerPC/scalar-i64-ldst.ll
+++ b/llvm/test/CodeGen/PowerPC/scalar-i64-ldst.ll
@@ -53,8 +53,7 @@ entry:
define dso_local i64 @ld_align32_int64_t_float(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_int64_t_float:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lfsx f0, r3, r4
+; CHECK-P10-NEXT: plfs f0, 99999000(r3), 0
; CHECK-P10-NEXT: xscvdpsxds f0, f0
; CHECK-P10-NEXT: mffprd r3, f0
; CHECK-P10-NEXT: blr
@@ -196,8 +195,7 @@ define dso_local i64 @ld_disjoint_align32_int64_t_float(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lfsx f0, r3, r4
+; CHECK-P10-NEXT: plfs f0, 999990000(r3), 0
; CHECK-P10-NEXT: xscvdpsxds f0, f0
; CHECK-P10-NEXT: mffprd r3, f0
; CHECK-P10-NEXT: blr
@@ -385,8 +383,7 @@ entry:
define dso_local i64 @ld_align32_int64_t_double(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_int64_t_double:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lfdx f0, r3, r4
+; CHECK-P10-NEXT: plfd f0, 99999000(r3), 0
; CHECK-P10-NEXT: xscvdpsxds f0, f0
; CHECK-P10-NEXT: mffprd r3, f0
; CHECK-P10-NEXT: blr
@@ -528,8 +525,7 @@ define dso_local i64 @ld_disjoint_align32_int64_t_double(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lfdx f0, r3, r4
+; CHECK-P10-NEXT: plfd f0, 999990000(r3), 0
; CHECK-P10-NEXT: xscvdpsxds f0, f0
; CHECK-P10-NEXT: mffprd r3, f0
; CHECK-P10-NEXT: blr
@@ -725,8 +721,7 @@ entry:
define dso_local i64 @ld_unalign32_uint64_t_uint8_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_unalign32_uint64_t_uint8_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 99999(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_unalign32_uint64_t_uint8_t:
@@ -746,8 +741,7 @@ entry:
define dso_local i64 @ld_align32_uint64_t_uint8_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_uint64_t_uint8_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align32_uint64_t_uint8_t:
@@ -925,8 +919,7 @@ define dso_local i64 @ld_disjoint_unalign32_uint64_t_uint8_t(i64 %ptr) {
; CHECK-P10-LABEL: ld_disjoint_unalign32_uint64_t_uint8_t:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: rldicr r3, r3, 0, 43
-; CHECK-P10-NEXT: pli r4, 99999
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 99999(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_disjoint_unalign32_uint64_t_uint8_t:
@@ -951,8 +944,7 @@ define dso_local i64 @ld_disjoint_align32_uint64_t_uint8_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_uint64_t_uint8_t:
@@ -1207,8 +1199,7 @@ entry:
define dso_local i64 @ld_unalign32_uint64_t_int8_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_unalign32_uint64_t_int8_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 99999(r3), 0
; CHECK-P10-NEXT: extsb r3, r3
; CHECK-P10-NEXT: blr
;
@@ -1230,8 +1221,7 @@ entry:
define dso_local i64 @ld_align32_uint64_t_int8_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_uint64_t_int8_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 99999000(r3), 0
; CHECK-P10-NEXT: extsb r3, r3
; CHECK-P10-NEXT: blr
;
@@ -1422,8 +1412,7 @@ define dso_local i64 @ld_disjoint_unalign32_uint64_t_int8_t(i64 %ptr) {
; CHECK-P10-LABEL: ld_disjoint_unalign32_uint64_t_int8_t:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: rldicr r3, r3, 0, 43
-; CHECK-P10-NEXT: pli r4, 99999
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 99999(r3), 0
; CHECK-P10-NEXT: extsb r3, r3
; CHECK-P10-NEXT: blr
;
@@ -1450,8 +1439,7 @@ define dso_local i64 @ld_disjoint_align32_uint64_t_int8_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 999990000(r3), 0
; CHECK-P10-NEXT: extsb r3, r3
; CHECK-P10-NEXT: blr
;
@@ -1722,8 +1710,7 @@ entry:
define dso_local i64 @ld_unalign32_uint64_t_uint16_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_unalign32_uint64_t_uint16_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999
-; CHECK-P10-NEXT: lhzx r3, r3, r4
+; CHECK-P10-NEXT: plhz r3, 99999(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_unalign32_uint64_t_uint16_t:
@@ -1744,8 +1731,7 @@ entry:
define dso_local i64 @ld_align32_uint64_t_uint16_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_uint64_t_uint16_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lhzx r3, r3, r4
+; CHECK-P10-NEXT: plhz r3, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align32_uint64_t_uint16_t:
@@ -1927,8 +1913,7 @@ define dso_local i64 @ld_disjoint_unalign32_uint64_t_uint16_t(i64 %ptr) {
; CHECK-P10-LABEL: ld_disjoint_unalign32_uint64_t_uint16_t:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: rldicr r3, r3, 0, 43
-; CHECK-P10-NEXT: pli r4, 99999
-; CHECK-P10-NEXT: lhzx r3, r3, r4
+; CHECK-P10-NEXT: plhz r3, 99999(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_disjoint_unalign32_uint64_t_uint16_t:
@@ -1953,8 +1938,7 @@ define dso_local i64 @ld_disjoint_align32_uint64_t_uint16_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lhzx r3, r3, r4
+; CHECK-P10-NEXT: plhz r3, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_uint64_t_uint16_t:
@@ -2208,8 +2192,7 @@ entry:
define dso_local i64 @ld_unalign32_uint64_t_int16_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_unalign32_uint64_t_int16_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999
-; CHECK-P10-NEXT: lhax r3, r3, r4
+; CHECK-P10-NEXT: plha r3, 99999(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_unalign32_uint64_t_int16_t:
@@ -2230,8 +2213,7 @@ entry:
define dso_local i64 @ld_align32_uint64_t_int16_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_uint64_t_int16_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lhax r3, r3, r4
+; CHECK-P10-NEXT: plha r3, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align32_uint64_t_int16_t:
@@ -2413,8 +2395,7 @@ define dso_local i64 @ld_disjoint_unalign32_uint64_t_int16_t(i64 %ptr) {
; CHECK-P10-LABEL: ld_disjoint_unalign32_uint64_t_int16_t:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: rldicr r3, r3, 0, 43
-; CHECK-P10-NEXT: pli r4, 99999
-; CHECK-P10-NEXT: lhax r3, r3, r4
+; CHECK-P10-NEXT: plha r3, 99999(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_disjoint_unalign32_uint64_t_int16_t:
@@ -2439,8 +2420,7 @@ define dso_local i64 @ld_disjoint_align32_uint64_t_int16_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lhax r3, r3, r4
+; CHECK-P10-NEXT: plha r3, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_uint64_t_int16_t:
@@ -2694,8 +2674,7 @@ entry:
define dso_local i64 @ld_unalign32_uint64_t_uint32_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_unalign32_uint64_t_uint32_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999
-; CHECK-P10-NEXT: lwzx r3, r3, r4
+; CHECK-P10-NEXT: plwz r3, 99999(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_unalign32_uint64_t_uint32_t:
@@ -2716,8 +2695,7 @@ entry:
define dso_local i64 @ld_align32_uint64_t_uint32_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_uint64_t_uint32_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lwzx r3, r3, r4
+; CHECK-P10-NEXT: plwz r3, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align32_uint64_t_uint32_t:
@@ -2899,8 +2877,7 @@ define dso_local i64 @ld_disjoint_unalign32_uint64_t_uint32_t(i64 %ptr) {
; CHECK-P10-LABEL: ld_disjoint_unalign32_uint64_t_uint32_t:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: rldicr r3, r3, 0, 43
-; CHECK-P10-NEXT: pli r4, 99999
-; CHECK-P10-NEXT: lwzx r3, r3, r4
+; CHECK-P10-NEXT: plwz r3, 99999(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_disjoint_unalign32_uint64_t_uint32_t:
@@ -2925,8 +2902,7 @@ define dso_local i64 @ld_disjoint_align32_uint64_t_uint32_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lwzx r3, r3, r4
+; CHECK-P10-NEXT: plwz r3, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_uint64_t_uint32_t:
@@ -3150,11 +3126,16 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_unalign16_uint64_t_int32_t(i8* nocapture readonly %ptr) {
-; CHECK-LABEL: ld_unalign16_uint64_t_int32_t:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: li r4, 1
-; CHECK-NEXT: lwax r3, r3, r4
-; CHECK-NEXT: blr
+; CHECK-P10-LABEL: ld_unalign16_uint64_t_int32_t:
+; CHECK-P10: # %bb.0: # %entry
+; CHECK-P10-NEXT: plwa r3, 1(r3), 0
+; CHECK-P10-NEXT: blr
+;
+; CHECK-PREP10-LABEL: ld_unalign16_uint64_t_int32_t:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 1
+; CHECK-PREP10-NEXT: lwax r3, r3, r4
+; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1
%0 = bitcast i8* %add.ptr to i32*
@@ -3181,8 +3162,7 @@ entry:
define dso_local i64 @ld_unalign32_uint64_t_int32_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_unalign32_uint64_t_int32_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999
-; CHECK-P10-NEXT: lwax r3, r3, r4
+; CHECK-P10-NEXT: plwa r3, 99999(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_unalign32_uint64_t_int32_t:
@@ -3203,8 +3183,7 @@ entry:
define dso_local i64 @ld_align32_uint64_t_int32_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_uint64_t_int32_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lwax r3, r3, r4
+; CHECK-P10-NEXT: plwa r3, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align32_uint64_t_int32_t:
@@ -3338,8 +3317,7 @@ define dso_local i64 @ld_disjoint_unalign16_uint64_t_int32_t(i64 %ptr) {
; CHECK-P10-LABEL: ld_disjoint_unalign16_uint64_t_int32_t:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: li r4, 6
-; CHECK-P10-NEXT: lwax r3, r3, r4
+; CHECK-P10-NEXT: plwa r3, 6(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_unalign16_uint64_t_int32_t:
@@ -3401,8 +3379,7 @@ define dso_local i64 @ld_disjoint_unalign32_uint64_t_int32_t(i64 %ptr) {
; CHECK-P10-LABEL: ld_disjoint_unalign32_uint64_t_int32_t:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: rldicr r3, r3, 0, 43
-; CHECK-P10-NEXT: pli r4, 99999
-; CHECK-P10-NEXT: lwax r3, r3, r4
+; CHECK-P10-NEXT: plwa r3, 99999(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_disjoint_unalign32_uint64_t_int32_t:
@@ -3427,8 +3404,7 @@ define dso_local i64 @ld_disjoint_align32_uint64_t_int32_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lwax r3, r3, r4
+; CHECK-P10-NEXT: plwa r3, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_uint64_t_int32_t:
@@ -3659,11 +3635,16 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_unalign16_uint64_t_uint64_t(i8* nocapture readonly %ptr) {
-; CHECK-LABEL: ld_unalign16_uint64_t_uint64_t:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: li r4, 1
-; CHECK-NEXT: ldx r3, r3, r4
-; CHECK-NEXT: blr
+; CHECK-P10-LABEL: ld_unalign16_uint64_t_uint64_t:
+; CHECK-P10: # %bb.0: # %entry
+; CHECK-P10-NEXT: pld r3, 1(r3), 0
+; CHECK-P10-NEXT: blr
+;
+; CHECK-PREP10-LABEL: ld_unalign16_uint64_t_uint64_t:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: li r4, 1
+; CHECK-PREP10-NEXT: ldx r3, r3, r4
+; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1
%0 = bitcast i8* %add.ptr to i64*
@@ -3688,8 +3669,7 @@ entry:
define dso_local i64 @ld_unalign32_uint64_t_uint64_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_unalign32_uint64_t_uint64_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999
-; CHECK-P10-NEXT: ldx r3, r3, r4
+; CHECK-P10-NEXT: pld r3, 99999(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_unalign32_uint64_t_uint64_t:
@@ -3709,8 +3689,7 @@ entry:
define dso_local i64 @ld_align32_uint64_t_uint64_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_uint64_t_uint64_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: ldx r3, r3, r4
+; CHECK-P10-NEXT: pld r3, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align32_uint64_t_uint64_t:
@@ -3837,8 +3816,7 @@ define dso_local i64 @ld_disjoint_unalign16_uint64_t_uint64_t(i64 %ptr) {
; CHECK-P10-LABEL: ld_disjoint_unalign16_uint64_t_uint64_t:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
-; CHECK-P10-NEXT: li r4, 6
-; CHECK-P10-NEXT: ldx r3, r3, r4
+; CHECK-P10-NEXT: pld r3, 6(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_unalign16_uint64_t_uint64_t:
@@ -3897,8 +3875,7 @@ define dso_local i64 @ld_disjoint_unalign32_uint64_t_uint64_t(i64 %ptr) {
; CHECK-P10-LABEL: ld_disjoint_unalign32_uint64_t_uint64_t:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: rldicr r3, r3, 0, 43
-; CHECK-P10-NEXT: pli r4, 99999
-; CHECK-P10-NEXT: ldx r3, r3, r4
+; CHECK-P10-NEXT: pld r3, 99999(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_disjoint_unalign32_uint64_t_uint64_t:
@@ -3922,8 +3899,7 @@ define dso_local i64 @ld_disjoint_align32_uint64_t_uint64_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: ldx r3, r3, r4
+; CHECK-P10-NEXT: pld r3, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_uint64_t_uint64_t:
@@ -4147,12 +4123,19 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_unalign16_uint64_t_float(i8* nocapture readonly %ptr) {
-; CHECK-LABEL: ld_unalign16_uint64_t_float:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: lfs f0, 1(r3)
-; CHECK-NEXT: xscvdpuxds f0, f0
-; CHECK-NEXT: mffprd r3, f0
-; CHECK-NEXT: blr
+; CHECK-P10-LABEL: ld_unalign16_uint64_t_float:
+; CHECK-P10: # %bb.0: # %entry
+; CHECK-P10-NEXT: plfs f0, 1(r3), 0
+; CHECK-P10-NEXT: xscvdpuxds f0, f0
+; CHECK-P10-NEXT: mffprd r3, f0
+; CHECK-P10-NEXT: blr
+;
+; CHECK-PREP10-LABEL: ld_unalign16_uint64_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lfs f0, 1(r3)
+; CHECK-PREP10-NEXT: xscvdpuxds f0, f0
+; CHECK-PREP10-NEXT: mffprd r3, f0
+; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1
%0 = bitcast i8* %add.ptr to float*
@@ -4181,8 +4164,7 @@ entry:
define dso_local i64 @ld_unalign32_uint64_t_float(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_unalign32_uint64_t_float:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999
-; CHECK-P10-NEXT: lfsx f0, r3, r4
+; CHECK-P10-NEXT: plfs f0, 99999(r3), 0
; CHECK-P10-NEXT: xscvdpuxds f0, f0
; CHECK-P10-NEXT: mffprd r3, f0
; CHECK-P10-NEXT: blr
@@ -4207,8 +4189,7 @@ entry:
define dso_local i64 @ld_align32_uint64_t_float(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_uint64_t_float:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lfsx f0, r3, r4
+; CHECK-P10-NEXT: plfs f0, 99999000(r3), 0
; CHECK-P10-NEXT: xscvdpuxds f0, f0
; CHECK-P10-NEXT: mffprd r3, f0
; CHECK-P10-NEXT: blr
@@ -4359,13 +4340,21 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_disjoint_unalign16_uint64_t_float(i64 %ptr) {
-; CHECK-LABEL: ld_disjoint_unalign16_uint64_t_float:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: rldicr r3, r3, 0, 51
-; CHECK-NEXT: lfs f0, 6(r3)
-; CHECK-NEXT: xscvdpuxds f0, f0
-; CHECK-NEXT: mffprd r3, f0
-; CHECK-NEXT: blr
+; CHECK-P10-LABEL: ld_disjoint_unalign16_uint64_t_float:
+; CHECK-P10: # %bb.0: # %entry
+; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
+; CHECK-P10-NEXT: plfs f0, 6(r3), 0
+; CHECK-P10-NEXT: xscvdpuxds f0, f0
+; CHECK-P10-NEXT: mffprd r3, f0
+; CHECK-P10-NEXT: blr
+;
+; CHECK-PREP10-LABEL: ld_disjoint_unalign16_uint64_t_float:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: rldicr r3, r3, 0, 51
+; CHECK-PREP10-NEXT: lfs f0, 6(r3)
+; CHECK-PREP10-NEXT: xscvdpuxds f0, f0
+; CHECK-PREP10-NEXT: mffprd r3, f0
+; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 6
@@ -4416,8 +4405,7 @@ define dso_local i64 @ld_disjoint_unalign32_uint64_t_float(i64 %ptr) {
; CHECK-P10-LABEL: ld_disjoint_unalign32_uint64_t_float:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: rldicr r3, r3, 0, 43
-; CHECK-P10-NEXT: pli r4, 99999
-; CHECK-P10-NEXT: lfsx f0, r3, r4
+; CHECK-P10-NEXT: plfs f0, 99999(r3), 0
; CHECK-P10-NEXT: xscvdpuxds f0, f0
; CHECK-P10-NEXT: mffprd r3, f0
; CHECK-P10-NEXT: blr
@@ -4446,8 +4434,7 @@ define dso_local i64 @ld_disjoint_align32_uint64_t_float(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lfsx f0, r3, r4
+; CHECK-P10-NEXT: plfs f0, 999990000(r3), 0
; CHECK-P10-NEXT: xscvdpuxds f0, f0
; CHECK-P10-NEXT: mffprd r3, f0
; CHECK-P10-NEXT: blr
@@ -4740,12 +4727,19 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_unalign16_uint64_t_double(i8* nocapture readonly %ptr) {
-; CHECK-LABEL: ld_unalign16_uint64_t_double:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: lfd f0, 1(r3)
-; CHECK-NEXT: xscvdpuxds f0, f0
-; CHECK-NEXT: mffprd r3, f0
-; CHECK-NEXT: blr
+; CHECK-P10-LABEL: ld_unalign16_uint64_t_double:
+; CHECK-P10: # %bb.0: # %entry
+; CHECK-P10-NEXT: plfd f0, 1(r3), 0
+; CHECK-P10-NEXT: xscvdpuxds f0, f0
+; CHECK-P10-NEXT: mffprd r3, f0
+; CHECK-P10-NEXT: blr
+;
+; CHECK-PREP10-LABEL: ld_unalign16_uint64_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: lfd f0, 1(r3)
+; CHECK-PREP10-NEXT: xscvdpuxds f0, f0
+; CHECK-PREP10-NEXT: mffprd r3, f0
+; CHECK-PREP10-NEXT: blr
entry:
%add.ptr = getelementptr inbounds i8, i8* %ptr, i64 1
%0 = bitcast i8* %add.ptr to double*
@@ -4774,8 +4768,7 @@ entry:
define dso_local i64 @ld_unalign32_uint64_t_double(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_unalign32_uint64_t_double:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999
-; CHECK-P10-NEXT: lfdx f0, r3, r4
+; CHECK-P10-NEXT: plfd f0, 99999(r3), 0
; CHECK-P10-NEXT: xscvdpuxds f0, f0
; CHECK-P10-NEXT: mffprd r3, f0
; CHECK-P10-NEXT: blr
@@ -4800,8 +4793,7 @@ entry:
define dso_local i64 @ld_align32_uint64_t_double(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_uint64_t_double:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lfdx f0, r3, r4
+; CHECK-P10-NEXT: plfd f0, 99999000(r3), 0
; CHECK-P10-NEXT: xscvdpuxds f0, f0
; CHECK-P10-NEXT: mffprd r3, f0
; CHECK-P10-NEXT: blr
@@ -4952,13 +4944,21 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local i64 @ld_disjoint_unalign16_uint64_t_double(i64 %ptr) {
-; CHECK-LABEL: ld_disjoint_unalign16_uint64_t_double:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: rldicr r3, r3, 0, 51
-; CHECK-NEXT: lfd f0, 6(r3)
-; CHECK-NEXT: xscvdpuxds f0, f0
-; CHECK-NEXT: mffprd r3, f0
-; CHECK-NEXT: blr
+; CHECK-P10-LABEL: ld_disjoint_unalign16_uint64_t_double:
+; CHECK-P10: # %bb.0: # %entry
+; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
+; CHECK-P10-NEXT: plfd f0, 6(r3), 0
+; CHECK-P10-NEXT: xscvdpuxds f0, f0
+; CHECK-P10-NEXT: mffprd r3, f0
+; CHECK-P10-NEXT: blr
+;
+; CHECK-PREP10-LABEL: ld_disjoint_unalign16_uint64_t_double:
+; CHECK-PREP10: # %bb.0: # %entry
+; CHECK-PREP10-NEXT: rldicr r3, r3, 0, 51
+; CHECK-PREP10-NEXT: lfd f0, 6(r3)
+; CHECK-PREP10-NEXT: xscvdpuxds f0, f0
+; CHECK-PREP10-NEXT: mffprd r3, f0
+; CHECK-PREP10-NEXT: blr
entry:
%and = and i64 %ptr, -4096
%or = or i64 %and, 6
@@ -5009,8 +5009,7 @@ define dso_local i64 @ld_disjoint_unalign32_uint64_t_double(i64 %ptr) {
; CHECK-P10-LABEL: ld_disjoint_unalign32_uint64_t_double:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: rldicr r3, r3, 0, 43
-; CHECK-P10-NEXT: pli r4, 99999
-; CHECK-P10-NEXT: lfdx f0, r3, r4
+; CHECK-P10-NEXT: plfd f0, 99999(r3), 0
; CHECK-P10-NEXT: xscvdpuxds f0, f0
; CHECK-P10-NEXT: mffprd r3, f0
; CHECK-P10-NEXT: blr
@@ -5039,8 +5038,7 @@ define dso_local i64 @ld_disjoint_align32_uint64_t_double(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lfdx f0, r3, r4
+; CHECK-P10-NEXT: plfd f0, 999990000(r3), 0
; CHECK-P10-NEXT: xscvdpuxds f0, f0
; CHECK-P10-NEXT: mffprd r3, f0
; CHECK-P10-NEXT: blr
@@ -5346,8 +5344,7 @@ entry:
define dso_local void @st_align32_uint64_t_uint8_t(i8* nocapture %ptr, i64 %str) {
; CHECK-P10-LABEL: st_align32_uint64_t_uint8_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r5, 99999000
-; CHECK-P10-NEXT: stbx r4, r3, r5
+; CHECK-P10-NEXT: pstb r4, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_uint64_t_uint8_t:
@@ -5485,8 +5482,7 @@ define dso_local void @st_disjoint_align32_uint64_t_uint8_t(i64 %ptr, i64 %str)
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r5, -15264
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: pli r5, 999990000
-; CHECK-P10-NEXT: stbx r4, r3, r5
+; CHECK-P10-NEXT: pstb r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint64_t_uint8_t:
@@ -5648,8 +5644,7 @@ entry:
define dso_local void @st_align32_uint64_t_uint16_t(i8* nocapture %ptr, i64 %str) {
; CHECK-P10-LABEL: st_align32_uint64_t_uint16_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r5, 99999000
-; CHECK-P10-NEXT: sthx r4, r3, r5
+; CHECK-P10-NEXT: psth r4, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_uint64_t_uint16_t:
@@ -5790,8 +5785,7 @@ define dso_local void @st_disjoint_align32_uint64_t_uint16_t(i64 %ptr, i64 %str)
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r5, -15264
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: pli r5, 999990000
-; CHECK-P10-NEXT: sthx r4, r3, r5
+; CHECK-P10-NEXT: psth r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint64_t_uint16_t:
@@ -5953,8 +5947,7 @@ entry:
define dso_local void @st_align32_uint64_t_int16_t(i8* nocapture %ptr, i64 %str) {
; CHECK-P10-LABEL: st_align32_uint64_t_int16_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r5, 99999000
-; CHECK-P10-NEXT: sthx r4, r3, r5
+; CHECK-P10-NEXT: psth r4, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_uint64_t_int16_t:
@@ -6095,8 +6088,7 @@ define dso_local void @st_disjoint_align32_uint64_t_int16_t(i64 %ptr, i64 %str)
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r5, -15264
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: pli r5, 999990000
-; CHECK-P10-NEXT: sthx r4, r3, r5
+; CHECK-P10-NEXT: psth r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint64_t_int16_t:
@@ -6258,8 +6250,7 @@ entry:
define dso_local void @st_align32_uint64_t_uint32_t(i8* nocapture %ptr, i64 %str) {
; CHECK-P10-LABEL: st_align32_uint64_t_uint32_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r5, 99999000
-; CHECK-P10-NEXT: stwx r4, r3, r5
+; CHECK-P10-NEXT: pstw r4, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_uint64_t_uint32_t:
@@ -6400,8 +6391,7 @@ define dso_local void @st_disjoint_align32_uint64_t_uint32_t(i64 %ptr, i64 %str)
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r5, -15264
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: pli r5, 999990000
-; CHECK-P10-NEXT: stwx r4, r3, r5
+; CHECK-P10-NEXT: pstw r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint64_t_uint32_t:
@@ -6561,8 +6551,7 @@ entry:
define dso_local void @st_align32_uint64_t_uint64_t(i8* nocapture %ptr, i64 %str) {
; CHECK-P10-LABEL: st_align32_uint64_t_uint64_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r5, 99999000
-; CHECK-P10-NEXT: stdx r4, r3, r5
+; CHECK-P10-NEXT: pstd r4, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_uint64_t_uint64_t:
@@ -6695,8 +6684,7 @@ define dso_local void @st_disjoint_align32_uint64_t_uint64_t(i64 %ptr, i64 %str)
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r5, -15264
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: pli r5, 999990000
-; CHECK-P10-NEXT: stdx r4, r3, r5
+; CHECK-P10-NEXT: pstd r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint64_t_uint64_t:
@@ -6857,9 +6845,8 @@ define dso_local void @st_align32_uint64_t_float(i8* nocapture %ptr, i64 %str) {
; CHECK-P10-LABEL: st_align32_uint64_t_float:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: mtfprd f0, r4
-; CHECK-P10-NEXT: pli r4, 99999000
; CHECK-P10-NEXT: xscvuxdsp f0, f0
-; CHECK-P10-NEXT: stfsx f0, r3, r4
+; CHECK-P10-NEXT: pstfs f0, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_align32_uint64_t_float:
@@ -7055,10 +7042,9 @@ define dso_local void @st_disjoint_align32_uint64_t_float(i64 %ptr, i64 %str) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: mtfprd f0, r4
; CHECK-P10-NEXT: lis r5, -15264
-; CHECK-P10-NEXT: pli r4, 999990000
; CHECK-P10-NEXT: xscvuxdsp f0, f0
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: stfsx f0, r3, r4
+; CHECK-P10-NEXT: pstfs f0, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint64_t_float:
@@ -7266,9 +7252,8 @@ define dso_local void @st_align32_uint64_t_double(i8* nocapture %ptr, i64 %str)
; CHECK-P10-LABEL: st_align32_uint64_t_double:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: mtfprd f0, r4
-; CHECK-P10-NEXT: pli r4, 99999000
; CHECK-P10-NEXT: xscvuxddp f0, f0
-; CHECK-P10-NEXT: stfdx f0, r3, r4
+; CHECK-P10-NEXT: pstfd f0, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_align32_uint64_t_double:
@@ -7464,10 +7449,9 @@ define dso_local void @st_disjoint_align32_uint64_t_double(i64 %ptr, i64 %str) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: mtfprd f0, r4
; CHECK-P10-NEXT: lis r5, -15264
-; CHECK-P10-NEXT: pli r4, 999990000
; CHECK-P10-NEXT: xscvuxddp f0, f0
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: stfdx f0, r3, r4
+; CHECK-P10-NEXT: pstfd f0, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint64_t_double:
@@ -7675,9 +7659,8 @@ define dso_local void @st_align32_int64_t_float(i8* nocapture %ptr, i64 %str) {
; CHECK-P10-LABEL: st_align32_int64_t_float:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: mtfprd f0, r4
-; CHECK-P10-NEXT: pli r4, 99999000
; CHECK-P10-NEXT: xscvsxdsp f0, f0
-; CHECK-P10-NEXT: stfsx f0, r3, r4
+; CHECK-P10-NEXT: pstfs f0, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_align32_int64_t_float:
@@ -7873,10 +7856,9 @@ define dso_local void @st_disjoint_align32_int64_t_float(i64 %ptr, i64 %str) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: mtfprd f0, r4
; CHECK-P10-NEXT: lis r5, -15264
-; CHECK-P10-NEXT: pli r4, 999990000
; CHECK-P10-NEXT: xscvsxdsp f0, f0
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: stfsx f0, r3, r4
+; CHECK-P10-NEXT: pstfs f0, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_int64_t_float:
@@ -8084,9 +8066,8 @@ define dso_local void @st_align32_int64_t_double(i8* nocapture %ptr, i64 %str) {
; CHECK-P10-LABEL: st_align32_int64_t_double:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: mtfprd f0, r4
-; CHECK-P10-NEXT: pli r4, 99999000
; CHECK-P10-NEXT: xscvsxddp f0, f0
-; CHECK-P10-NEXT: stfdx f0, r3, r4
+; CHECK-P10-NEXT: pstfd f0, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_align32_int64_t_double:
@@ -8282,10 +8263,9 @@ define dso_local void @st_disjoint_align32_int64_t_double(i64 %ptr, i64 %str) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: mtfprd f0, r4
; CHECK-P10-NEXT: lis r5, -15264
-; CHECK-P10-NEXT: pli r4, 999990000
; CHECK-P10-NEXT: xscvsxddp f0, f0
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: stfdx f0, r3, r4
+; CHECK-P10-NEXT: pstfd f0, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_int64_t_double:
diff --git a/llvm/test/CodeGen/PowerPC/scalar-i8-ldst.ll b/llvm/test/CodeGen/PowerPC/scalar-i8-ldst.ll
index 715d7a5efd83b..9bbf7f79d4ff5 100644
--- a/llvm/test/CodeGen/PowerPC/scalar-i8-ldst.ll
+++ b/llvm/test/CodeGen/PowerPC/scalar-i8-ldst.ll
@@ -48,8 +48,7 @@ entry:
define dso_local signext i8 @ld_align32_int8_t_uint8_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_int8_t_uint8_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 99999000(r3), 0
; CHECK-P10-NEXT: extsb r3, r3
; CHECK-P10-NEXT: blr
;
@@ -172,8 +171,7 @@ define dso_local signext i8 @ld_disjoint_align32_int8_t_uint8_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 999990000(r3), 0
; CHECK-P10-NEXT: extsb r3, r3
; CHECK-P10-NEXT: blr
;
@@ -354,15 +352,13 @@ entry:
define dso_local signext i8 @ld_align32_int8_t_uint16_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LE-LABEL: ld_align32_int8_t_uint16_t:
; CHECK-P10-LE: # %bb.0: # %entry
-; CHECK-P10-LE-NEXT: pli r4, 99999000
-; CHECK-P10-LE-NEXT: lbzx r3, r3, r4
+; CHECK-P10-LE-NEXT: plbz r3, 99999000(r3), 0
; CHECK-P10-LE-NEXT: extsb r3, r3
; CHECK-P10-LE-NEXT: blr
;
; CHECK-P10-BE-LABEL: ld_align32_int8_t_uint16_t:
; CHECK-P10-BE: # %bb.0: # %entry
-; CHECK-P10-BE-NEXT: pli r4, 99999001
-; CHECK-P10-BE-NEXT: lbzx r3, r3, r4
+; CHECK-P10-BE-NEXT: plbz r3, 99999001(r3), 0
; CHECK-P10-BE-NEXT: extsb r3, r3
; CHECK-P10-BE-NEXT: blr
;
@@ -593,8 +589,7 @@ define dso_local signext i8 @ld_disjoint_align32_int8_t_uint16_t(i64 %ptr) {
; CHECK-P10-LE: # %bb.0: # %entry
; CHECK-P10-LE-NEXT: lis r4, -15264
; CHECK-P10-LE-NEXT: and r3, r3, r4
-; CHECK-P10-LE-NEXT: pli r4, 999990000
-; CHECK-P10-LE-NEXT: lbzx r3, r3, r4
+; CHECK-P10-LE-NEXT: plbz r3, 999990000(r3), 0
; CHECK-P10-LE-NEXT: extsb r3, r3
; CHECK-P10-LE-NEXT: blr
;
@@ -602,8 +597,7 @@ define dso_local signext i8 @ld_disjoint_align32_int8_t_uint16_t(i64 %ptr) {
; CHECK-P10-BE: # %bb.0: # %entry
; CHECK-P10-BE-NEXT: lis r4, -15264
; CHECK-P10-BE-NEXT: and r3, r3, r4
-; CHECK-P10-BE-NEXT: pli r4, 999990001
-; CHECK-P10-BE-NEXT: lbzx r3, r3, r4
+; CHECK-P10-BE-NEXT: plbz r3, 999990001(r3), 0
; CHECK-P10-BE-NEXT: extsb r3, r3
; CHECK-P10-BE-NEXT: blr
;
@@ -946,15 +940,13 @@ entry:
define dso_local signext i8 @ld_align32_int8_t_uint32_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LE-LABEL: ld_align32_int8_t_uint32_t:
; CHECK-P10-LE: # %bb.0: # %entry
-; CHECK-P10-LE-NEXT: pli r4, 99999000
-; CHECK-P10-LE-NEXT: lbzx r3, r3, r4
+; CHECK-P10-LE-NEXT: plbz r3, 99999000(r3), 0
; CHECK-P10-LE-NEXT: extsb r3, r3
; CHECK-P10-LE-NEXT: blr
;
; CHECK-P10-BE-LABEL: ld_align32_int8_t_uint32_t:
; CHECK-P10-BE: # %bb.0: # %entry
-; CHECK-P10-BE-NEXT: pli r4, 99999003
-; CHECK-P10-BE-NEXT: lbzx r3, r3, r4
+; CHECK-P10-BE-NEXT: plbz r3, 99999003(r3), 0
; CHECK-P10-BE-NEXT: extsb r3, r3
; CHECK-P10-BE-NEXT: blr
;
@@ -1185,8 +1177,7 @@ define dso_local signext i8 @ld_disjoint_align32_int8_t_uint32_t(i64 %ptr) {
; CHECK-P10-LE: # %bb.0: # %entry
; CHECK-P10-LE-NEXT: lis r4, -15264
; CHECK-P10-LE-NEXT: and r3, r3, r4
-; CHECK-P10-LE-NEXT: pli r4, 999990000
-; CHECK-P10-LE-NEXT: lbzx r3, r3, r4
+; CHECK-P10-LE-NEXT: plbz r3, 999990000(r3), 0
; CHECK-P10-LE-NEXT: extsb r3, r3
; CHECK-P10-LE-NEXT: blr
;
@@ -1194,8 +1185,7 @@ define dso_local signext i8 @ld_disjoint_align32_int8_t_uint32_t(i64 %ptr) {
; CHECK-P10-BE: # %bb.0: # %entry
; CHECK-P10-BE-NEXT: lis r4, -15264
; CHECK-P10-BE-NEXT: and r3, r3, r4
-; CHECK-P10-BE-NEXT: pli r4, 999990003
-; CHECK-P10-BE-NEXT: lbzx r3, r3, r4
+; CHECK-P10-BE-NEXT: plbz r3, 999990003(r3), 0
; CHECK-P10-BE-NEXT: extsb r3, r3
; CHECK-P10-BE-NEXT: blr
;
@@ -1538,15 +1528,13 @@ entry:
define dso_local signext i8 @ld_align32_int8_t_uint64_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LE-LABEL: ld_align32_int8_t_uint64_t:
; CHECK-P10-LE: # %bb.0: # %entry
-; CHECK-P10-LE-NEXT: pli r4, 99999000
-; CHECK-P10-LE-NEXT: lbzx r3, r3, r4
+; CHECK-P10-LE-NEXT: plbz r3, 99999000(r3), 0
; CHECK-P10-LE-NEXT: extsb r3, r3
; CHECK-P10-LE-NEXT: blr
;
; CHECK-P10-BE-LABEL: ld_align32_int8_t_uint64_t:
; CHECK-P10-BE: # %bb.0: # %entry
-; CHECK-P10-BE-NEXT: pli r4, 99999007
-; CHECK-P10-BE-NEXT: lbzx r3, r3, r4
+; CHECK-P10-BE-NEXT: plbz r3, 99999007(r3), 0
; CHECK-P10-BE-NEXT: extsb r3, r3
; CHECK-P10-BE-NEXT: blr
;
@@ -1777,8 +1765,7 @@ define dso_local signext i8 @ld_disjoint_align32_int8_t_uint64_t(i64 %ptr) {
; CHECK-P10-LE: # %bb.0: # %entry
; CHECK-P10-LE-NEXT: lis r4, -15264
; CHECK-P10-LE-NEXT: and r3, r3, r4
-; CHECK-P10-LE-NEXT: pli r4, 999990000
-; CHECK-P10-LE-NEXT: lbzx r3, r3, r4
+; CHECK-P10-LE-NEXT: plbz r3, 999990000(r3), 0
; CHECK-P10-LE-NEXT: extsb r3, r3
; CHECK-P10-LE-NEXT: blr
;
@@ -1786,8 +1773,7 @@ define dso_local signext i8 @ld_disjoint_align32_int8_t_uint64_t(i64 %ptr) {
; CHECK-P10-BE: # %bb.0: # %entry
; CHECK-P10-BE-NEXT: lis r4, -15264
; CHECK-P10-BE-NEXT: and r3, r3, r4
-; CHECK-P10-BE-NEXT: pli r4, 999990007
-; CHECK-P10-BE-NEXT: lbzx r3, r3, r4
+; CHECK-P10-BE-NEXT: plbz r3, 999990007(r3), 0
; CHECK-P10-BE-NEXT: extsb r3, r3
; CHECK-P10-BE-NEXT: blr
;
@@ -2122,8 +2108,7 @@ entry:
define dso_local signext i8 @ld_align32_int8_t_float(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_int8_t_float:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lfsx f0, r3, r4
+; CHECK-P10-NEXT: plfs f0, 99999000(r3), 0
; CHECK-P10-NEXT: xscvdpsxws f0, f0
; CHECK-P10-NEXT: mffprwz r3, f0
; CHECK-P10-NEXT: extsw r3, r3
@@ -2274,8 +2259,7 @@ define dso_local signext i8 @ld_disjoint_align32_int8_t_float(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lfsx f0, r3, r4
+; CHECK-P10-NEXT: plfs f0, 999990000(r3), 0
; CHECK-P10-NEXT: xscvdpsxws f0, f0
; CHECK-P10-NEXT: mffprwz r3, f0
; CHECK-P10-NEXT: extsw r3, r3
@@ -2476,8 +2460,7 @@ entry:
define dso_local signext i8 @ld_align32_int8_t_double(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_int8_t_double:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lfdx f0, r3, r4
+; CHECK-P10-NEXT: plfd f0, 99999000(r3), 0
; CHECK-P10-NEXT: xscvdpsxws f0, f0
; CHECK-P10-NEXT: mffprwz r3, f0
; CHECK-P10-NEXT: extsw r3, r3
@@ -2628,8 +2611,7 @@ define dso_local signext i8 @ld_disjoint_align32_int8_t_double(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lfdx f0, r3, r4
+; CHECK-P10-NEXT: plfd f0, 999990000(r3), 0
; CHECK-P10-NEXT: xscvdpsxws f0, f0
; CHECK-P10-NEXT: mffprwz r3, f0
; CHECK-P10-NEXT: extsw r3, r3
@@ -2821,8 +2803,7 @@ entry:
define dso_local zeroext i8 @ld_align32_uint8_t_uint8_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_uint8_t_uint8_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: ld_align32_uint8_t_uint8_t:
@@ -2960,8 +2941,7 @@ define dso_local zeroext i8 @ld_disjoint_align32_uint8_t_uint8_t(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lbzx r3, r3, r4
+; CHECK-P10-NEXT: plbz r3, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_uint8_t_uint8_t:
@@ -3178,14 +3158,12 @@ entry:
define dso_local zeroext i8 @ld_align32_uint8_t_uint16_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LE-LABEL: ld_align32_uint8_t_uint16_t:
; CHECK-P10-LE: # %bb.0: # %entry
-; CHECK-P10-LE-NEXT: pli r4, 99999000
-; CHECK-P10-LE-NEXT: lbzx r3, r3, r4
+; CHECK-P10-LE-NEXT: plbz r3, 99999000(r3), 0
; CHECK-P10-LE-NEXT: blr
;
; CHECK-P10-BE-LABEL: ld_align32_uint8_t_uint16_t:
; CHECK-P10-BE: # %bb.0: # %entry
-; CHECK-P10-BE-NEXT: pli r4, 99999001
-; CHECK-P10-BE-NEXT: lbzx r3, r3, r4
+; CHECK-P10-BE-NEXT: plbz r3, 99999001(r3), 0
; CHECK-P10-BE-NEXT: blr
;
; CHECK-P9-LE-LABEL: ld_align32_uint8_t_uint16_t:
@@ -3456,16 +3434,14 @@ define dso_local zeroext i8 @ld_disjoint_align32_uint8_t_uint16_t(i64 %ptr) {
; CHECK-P10-LE: # %bb.0: # %entry
; CHECK-P10-LE-NEXT: lis r4, -15264
; CHECK-P10-LE-NEXT: and r3, r3, r4
-; CHECK-P10-LE-NEXT: pli r4, 999990000
-; CHECK-P10-LE-NEXT: lbzx r3, r3, r4
+; CHECK-P10-LE-NEXT: plbz r3, 999990000(r3), 0
; CHECK-P10-LE-NEXT: blr
;
; CHECK-P10-BE-LABEL: ld_disjoint_align32_uint8_t_uint16_t:
; CHECK-P10-BE: # %bb.0: # %entry
; CHECK-P10-BE-NEXT: lis r4, -15264
; CHECK-P10-BE-NEXT: and r3, r3, r4
-; CHECK-P10-BE-NEXT: pli r4, 999990001
-; CHECK-P10-BE-NEXT: lbzx r3, r3, r4
+; CHECK-P10-BE-NEXT: plbz r3, 999990001(r3), 0
; CHECK-P10-BE-NEXT: blr
;
; CHECK-P9-LE-LABEL: ld_disjoint_align32_uint8_t_uint16_t:
@@ -3904,14 +3880,12 @@ entry:
define dso_local zeroext i8 @ld_align32_uint8_t_uint32_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LE-LABEL: ld_align32_uint8_t_uint32_t:
; CHECK-P10-LE: # %bb.0: # %entry
-; CHECK-P10-LE-NEXT: pli r4, 99999000
-; CHECK-P10-LE-NEXT: lbzx r3, r3, r4
+; CHECK-P10-LE-NEXT: plbz r3, 99999000(r3), 0
; CHECK-P10-LE-NEXT: blr
;
; CHECK-P10-BE-LABEL: ld_align32_uint8_t_uint32_t:
; CHECK-P10-BE: # %bb.0: # %entry
-; CHECK-P10-BE-NEXT: pli r4, 99999003
-; CHECK-P10-BE-NEXT: lbzx r3, r3, r4
+; CHECK-P10-BE-NEXT: plbz r3, 99999003(r3), 0
; CHECK-P10-BE-NEXT: blr
;
; CHECK-P9-LE-LABEL: ld_align32_uint8_t_uint32_t:
@@ -4182,16 +4156,14 @@ define dso_local zeroext i8 @ld_disjoint_align32_uint8_t_uint32_t(i64 %ptr) {
; CHECK-P10-LE: # %bb.0: # %entry
; CHECK-P10-LE-NEXT: lis r4, -15264
; CHECK-P10-LE-NEXT: and r3, r3, r4
-; CHECK-P10-LE-NEXT: pli r4, 999990000
-; CHECK-P10-LE-NEXT: lbzx r3, r3, r4
+; CHECK-P10-LE-NEXT: plbz r3, 999990000(r3), 0
; CHECK-P10-LE-NEXT: blr
;
; CHECK-P10-BE-LABEL: ld_disjoint_align32_uint8_t_uint32_t:
; CHECK-P10-BE: # %bb.0: # %entry
; CHECK-P10-BE-NEXT: lis r4, -15264
; CHECK-P10-BE-NEXT: and r3, r3, r4
-; CHECK-P10-BE-NEXT: pli r4, 999990003
-; CHECK-P10-BE-NEXT: lbzx r3, r3, r4
+; CHECK-P10-BE-NEXT: plbz r3, 999990003(r3), 0
; CHECK-P10-BE-NEXT: blr
;
; CHECK-P9-LE-LABEL: ld_disjoint_align32_uint8_t_uint32_t:
@@ -4630,14 +4602,12 @@ entry:
define dso_local zeroext i8 @ld_align32_uint8_t_uint64_t(i8* nocapture readonly %ptr) {
; CHECK-P10-LE-LABEL: ld_align32_uint8_t_uint64_t:
; CHECK-P10-LE: # %bb.0: # %entry
-; CHECK-P10-LE-NEXT: pli r4, 99999000
-; CHECK-P10-LE-NEXT: lbzx r3, r3, r4
+; CHECK-P10-LE-NEXT: plbz r3, 99999000(r3), 0
; CHECK-P10-LE-NEXT: blr
;
; CHECK-P10-BE-LABEL: ld_align32_uint8_t_uint64_t:
; CHECK-P10-BE: # %bb.0: # %entry
-; CHECK-P10-BE-NEXT: pli r4, 99999007
-; CHECK-P10-BE-NEXT: lbzx r3, r3, r4
+; CHECK-P10-BE-NEXT: plbz r3, 99999007(r3), 0
; CHECK-P10-BE-NEXT: blr
;
; CHECK-P9-LE-LABEL: ld_align32_uint8_t_uint64_t:
@@ -4908,16 +4878,14 @@ define dso_local zeroext i8 @ld_disjoint_align32_uint8_t_uint64_t(i64 %ptr) {
; CHECK-P10-LE: # %bb.0: # %entry
; CHECK-P10-LE-NEXT: lis r4, -15264
; CHECK-P10-LE-NEXT: and r3, r3, r4
-; CHECK-P10-LE-NEXT: pli r4, 999990000
-; CHECK-P10-LE-NEXT: lbzx r3, r3, r4
+; CHECK-P10-LE-NEXT: plbz r3, 999990000(r3), 0
; CHECK-P10-LE-NEXT: blr
;
; CHECK-P10-BE-LABEL: ld_disjoint_align32_uint8_t_uint64_t:
; CHECK-P10-BE: # %bb.0: # %entry
; CHECK-P10-BE-NEXT: lis r4, -15264
; CHECK-P10-BE-NEXT: and r3, r3, r4
-; CHECK-P10-BE-NEXT: pli r4, 999990007
-; CHECK-P10-BE-NEXT: lbzx r3, r3, r4
+; CHECK-P10-BE-NEXT: plbz r3, 999990007(r3), 0
; CHECK-P10-BE-NEXT: blr
;
; CHECK-P9-LE-LABEL: ld_disjoint_align32_uint8_t_uint64_t:
@@ -5352,8 +5320,7 @@ entry:
define dso_local zeroext i8 @ld_align32_uint8_t_float(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_uint8_t_float:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lfsx f0, r3, r4
+; CHECK-P10-NEXT: plfs f0, 99999000(r3), 0
; CHECK-P10-NEXT: xscvdpsxws f0, f0
; CHECK-P10-NEXT: mffprwz r3, f0
; CHECK-P10-NEXT: clrldi r3, r3, 32
@@ -5536,8 +5503,7 @@ define dso_local zeroext i8 @ld_disjoint_align32_uint8_t_float(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lfsx f0, r3, r4
+; CHECK-P10-NEXT: plfs f0, 999990000(r3), 0
; CHECK-P10-NEXT: xscvdpsxws f0, f0
; CHECK-P10-NEXT: mffprwz r3, f0
; CHECK-P10-NEXT: clrldi r3, r3, 32
@@ -5803,8 +5769,7 @@ entry:
define dso_local zeroext i8 @ld_align32_uint8_t_double(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_uint8_t_double:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lfdx f0, r3, r4
+; CHECK-P10-NEXT: plfd f0, 99999000(r3), 0
; CHECK-P10-NEXT: xscvdpsxws f0, f0
; CHECK-P10-NEXT: mffprwz r3, f0
; CHECK-P10-NEXT: clrldi r3, r3, 32
@@ -5987,8 +5952,7 @@ define dso_local zeroext i8 @ld_disjoint_align32_uint8_t_double(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lfdx f0, r3, r4
+; CHECK-P10-NEXT: plfd f0, 999990000(r3), 0
; CHECK-P10-NEXT: xscvdpsxws f0, f0
; CHECK-P10-NEXT: mffprwz r3, f0
; CHECK-P10-NEXT: clrldi r3, r3, 32
@@ -6245,8 +6209,7 @@ entry:
define dso_local void @st_align32_uint8_t_uint8_t(i8* nocapture %ptr, i8 zeroext %str) {
; CHECK-P10-LABEL: st_align32_uint8_t_uint8_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r5, 99999000
-; CHECK-P10-NEXT: stbx r4, r3, r5
+; CHECK-P10-NEXT: pstb r4, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_uint8_t_uint8_t:
@@ -6360,8 +6323,7 @@ define dso_local void @st_disjoint_align32_uint8_t_uint8_t(i64 %ptr, i8 zeroext
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r5, -15264
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: pli r5, 999990000
-; CHECK-P10-NEXT: stbx r4, r3, r5
+; CHECK-P10-NEXT: pstb r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint8_t_uint8_t:
@@ -6517,8 +6479,7 @@ entry:
define dso_local void @st_align32_uint8_t_uint16_t(i8* nocapture %ptr, i8 zeroext %str) {
; CHECK-P10-LABEL: st_align32_uint8_t_uint16_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r5, 99999000
-; CHECK-P10-NEXT: sthx r4, r3, r5
+; CHECK-P10-NEXT: psth r4, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_uint8_t_uint16_t:
@@ -6642,8 +6603,7 @@ define dso_local void @st_disjoint_align32_uint8_t_uint16_t(i64 %ptr, i8 zeroext
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r5, -15264
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: pli r5, 999990000
-; CHECK-P10-NEXT: sthx r4, r3, r5
+; CHECK-P10-NEXT: psth r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint8_t_uint16_t:
@@ -6805,8 +6765,7 @@ entry:
define dso_local void @st_align32_uint8_t_uint32_t(i8* nocapture %ptr, i8 zeroext %str) {
; CHECK-P10-LABEL: st_align32_uint8_t_uint32_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r5, 99999000
-; CHECK-P10-NEXT: stwx r4, r3, r5
+; CHECK-P10-NEXT: pstw r4, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_uint8_t_uint32_t:
@@ -6930,8 +6889,7 @@ define dso_local void @st_disjoint_align32_uint8_t_uint32_t(i64 %ptr, i8 zeroext
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r5, -15264
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: pli r5, 999990000
-; CHECK-P10-NEXT: stwx r4, r3, r5
+; CHECK-P10-NEXT: pstw r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint8_t_uint32_t:
@@ -7093,8 +7051,7 @@ entry:
define dso_local void @st_align32_uint8_t_uint64_t(i8* nocapture %ptr, i8 zeroext %str) {
; CHECK-P10-LABEL: st_align32_uint8_t_uint64_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r5, 99999000
-; CHECK-P10-NEXT: stdx r4, r3, r5
+; CHECK-P10-NEXT: pstd r4, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_uint8_t_uint64_t:
@@ -7218,8 +7175,7 @@ define dso_local void @st_disjoint_align32_uint8_t_uint64_t(i64 %ptr, i8 zeroext
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r5, -15264
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: pli r5, 999990000
-; CHECK-P10-NEXT: stdx r4, r3, r5
+; CHECK-P10-NEXT: pstd r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint8_t_uint64_t:
@@ -7386,9 +7342,8 @@ define dso_local void @st_align32_uint8_t_float(i8* nocapture %ptr, i8 zeroext %
; CHECK-P10-LABEL: st_align32_uint8_t_float:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: mtfprwz f0, r4
-; CHECK-P10-NEXT: pli r4, 99999000
; CHECK-P10-NEXT: xscvuxdsp f0, f0
-; CHECK-P10-NEXT: stfsx f0, r3, r4
+; CHECK-P10-NEXT: pstfs f0, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_align32_uint8_t_float:
@@ -7565,10 +7520,9 @@ define dso_local void @st_disjoint_align32_uint8_t_float(i64 %ptr, i8 zeroext %s
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: mtfprwz f0, r4
; CHECK-P10-NEXT: lis r5, -15264
-; CHECK-P10-NEXT: pli r4, 999990000
; CHECK-P10-NEXT: xscvuxdsp f0, f0
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: stfsx f0, r3, r4
+; CHECK-P10-NEXT: pstfs f0, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint8_t_float:
@@ -7776,9 +7730,8 @@ define dso_local void @st_align32_uint8_t_double(i8* nocapture %ptr, i8 zeroext
; CHECK-P10-LABEL: st_align32_uint8_t_double:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: mtfprwz f0, r4
-; CHECK-P10-NEXT: pli r4, 99999000
; CHECK-P10-NEXT: xscvuxddp f0, f0
-; CHECK-P10-NEXT: stfdx f0, r3, r4
+; CHECK-P10-NEXT: pstfd f0, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_align32_uint8_t_double:
@@ -7955,10 +7908,9 @@ define dso_local void @st_disjoint_align32_uint8_t_double(i64 %ptr, i8 zeroext %
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: mtfprwz f0, r4
; CHECK-P10-NEXT: lis r5, -15264
-; CHECK-P10-NEXT: pli r4, 999990000
; CHECK-P10-NEXT: xscvuxddp f0, f0
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: stfdx f0, r3, r4
+; CHECK-P10-NEXT: pstfd f0, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_uint8_t_double:
@@ -8161,8 +8113,7 @@ entry:
define dso_local void @st_align32_int8_t_uint16_t(i8* nocapture %ptr, i8 signext %str) {
; CHECK-P10-LABEL: st_align32_int8_t_uint16_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r5, 99999000
-; CHECK-P10-NEXT: sthx r4, r3, r5
+; CHECK-P10-NEXT: psth r4, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_int8_t_uint16_t:
@@ -8286,8 +8237,7 @@ define dso_local void @st_disjoint_align32_int8_t_uint16_t(i64 %ptr, i8 signext
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r5, -15264
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: pli r5, 999990000
-; CHECK-P10-NEXT: sthx r4, r3, r5
+; CHECK-P10-NEXT: psth r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_int8_t_uint16_t:
@@ -8449,8 +8399,7 @@ entry:
define dso_local void @st_align32_int8_t_uint32_t(i8* nocapture %ptr, i8 signext %str) {
; CHECK-P10-LABEL: st_align32_int8_t_uint32_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r5, 99999000
-; CHECK-P10-NEXT: stwx r4, r3, r5
+; CHECK-P10-NEXT: pstw r4, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_int8_t_uint32_t:
@@ -8574,8 +8523,7 @@ define dso_local void @st_disjoint_align32_int8_t_uint32_t(i64 %ptr, i8 signext
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r5, -15264
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: pli r5, 999990000
-; CHECK-P10-NEXT: stwx r4, r3, r5
+; CHECK-P10-NEXT: pstw r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_int8_t_uint32_t:
@@ -8737,8 +8685,7 @@ entry:
define dso_local void @st_align32_int8_t_uint64_t(i8* nocapture %ptr, i8 signext %str) {
; CHECK-P10-LABEL: st_align32_int8_t_uint64_t:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r5, 99999000
-; CHECK-P10-NEXT: stdx r4, r3, r5
+; CHECK-P10-NEXT: pstd r4, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-PREP10-LABEL: st_align32_int8_t_uint64_t:
@@ -8862,8 +8809,7 @@ define dso_local void @st_disjoint_align32_int8_t_uint64_t(i64 %ptr, i8 signext
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r5, -15264
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: pli r5, 999990000
-; CHECK-P10-NEXT: stdx r4, r3, r5
+; CHECK-P10-NEXT: pstd r4, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_int8_t_uint64_t:
@@ -9030,9 +8976,8 @@ define dso_local void @st_align32_int8_t_float(i8* nocapture %ptr, i8 signext %s
; CHECK-P10-LABEL: st_align32_int8_t_float:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: mtfprwa f0, r4
-; CHECK-P10-NEXT: pli r4, 99999000
; CHECK-P10-NEXT: xscvsxdsp f0, f0
-; CHECK-P10-NEXT: stfsx f0, r3, r4
+; CHECK-P10-NEXT: pstfs f0, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_align32_int8_t_float:
@@ -9209,10 +9154,9 @@ define dso_local void @st_disjoint_align32_int8_t_float(i64 %ptr, i8 signext %st
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: mtfprwa f0, r4
; CHECK-P10-NEXT: lis r5, -15264
-; CHECK-P10-NEXT: pli r4, 999990000
; CHECK-P10-NEXT: xscvsxdsp f0, f0
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: stfsx f0, r3, r4
+; CHECK-P10-NEXT: pstfs f0, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_int8_t_float:
@@ -9420,9 +9364,8 @@ define dso_local void @st_align32_int8_t_double(i8* nocapture %ptr, i8 signext %
; CHECK-P10-LABEL: st_align32_int8_t_double:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: mtfprwa f0, r4
-; CHECK-P10-NEXT: pli r4, 99999000
; CHECK-P10-NEXT: xscvsxddp f0, f0
-; CHECK-P10-NEXT: stfdx f0, r3, r4
+; CHECK-P10-NEXT: pstfd f0, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_align32_int8_t_double:
@@ -9599,10 +9542,9 @@ define dso_local void @st_disjoint_align32_int8_t_double(i64 %ptr, i8 signext %s
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: mtfprwa f0, r4
; CHECK-P10-NEXT: lis r5, -15264
-; CHECK-P10-NEXT: pli r4, 999990000
; CHECK-P10-NEXT: xscvsxddp f0, f0
; CHECK-P10-NEXT: and r3, r3, r5
-; CHECK-P10-NEXT: stfdx f0, r3, r4
+; CHECK-P10-NEXT: pstfd f0, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_int8_t_double:
diff --git a/llvm/test/CodeGen/PowerPC/vec_insert_elt.ll b/llvm/test/CodeGen/PowerPC/vec_insert_elt.ll
index 92536e0686228..16e8811538ea8 100644
--- a/llvm/test/CodeGen/PowerPC/vec_insert_elt.ll
+++ b/llvm/test/CodeGen/PowerPC/vec_insert_elt.ll
@@ -671,15 +671,13 @@ entry:
define <2 x double> @testDoubleImm4(<2 x double> %a, i32* %b) {
; CHECK-LABEL: testDoubleImm4:
; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: lis r3, 4
-; CHECK-NEXT: lfdx f0, r5, r3
+; CHECK-NEXT: plfd f0, 262144(r5), 0
; CHECK-NEXT: xxmrghd v2, v2, vs0
; CHECK-NEXT: blr
;
; CHECK-BE-LABEL: testDoubleImm4:
; CHECK-BE: # %bb.0: # %entry
-; CHECK-BE-NEXT: lis r3, 4
-; CHECK-BE-NEXT: lfdx f0, r5, r3
+; CHECK-BE-NEXT: plfd f0, 262144(r5), 0
; CHECK-BE-NEXT: xxpermdi v2, vs0, v2, 1
; CHECK-BE-NEXT: blr
;
diff --git a/llvm/test/CodeGen/PowerPC/vector-ldst.ll b/llvm/test/CodeGen/PowerPC/vector-ldst.ll
index 4ccb28d70a83b..0c75f67743563 100644
--- a/llvm/test/CodeGen/PowerPC/vector-ldst.ll
+++ b/llvm/test/CodeGen/PowerPC/vector-ldst.ll
@@ -42,11 +42,16 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local <16 x i8> @ld_unalign16_vector(i8* nocapture readonly %ptr) {
-; CHECK-LABEL: ld_unalign16_vector:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: li r4, 1
-; CHECK-NEXT: lxvx v2, r3, r4
-; CHECK-NEXT: blr
+; CHECK-P10-LABEL: ld_unalign16_vector:
+; CHECK-P10: # %bb.0: # %entry
+; CHECK-P10-NEXT: plxv v2, 1(r3), 0
+; CHECK-P10-NEXT: blr
+;
+; CHECK-P9-LABEL: ld_unalign16_vector:
+; CHECK-P9: # %bb.0: # %entry
+; CHECK-P9-NEXT: li r4, 1
+; CHECK-P9-NEXT: lxvx v2, r3, r4
+; CHECK-P9-NEXT: blr
;
; CHECK-P8-LE-LABEL: ld_unalign16_vector:
; CHECK-P8-LE: # %bb.0: # %entry
@@ -68,11 +73,16 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local <16 x i8> @ld_align16_vector(i8* nocapture readonly %ptr) {
-; CHECK-LABEL: ld_align16_vector:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: li r4, 8
-; CHECK-NEXT: lxvx v2, r3, r4
-; CHECK-NEXT: blr
+; CHECK-P10-LABEL: ld_align16_vector:
+; CHECK-P10: # %bb.0: # %entry
+; CHECK-P10-NEXT: plxv v2, 8(r3), 0
+; CHECK-P10-NEXT: blr
+;
+; CHECK-P9-LABEL: ld_align16_vector:
+; CHECK-P9: # %bb.0: # %entry
+; CHECK-P9-NEXT: li r4, 8
+; CHECK-P9-NEXT: lxvx v2, r3, r4
+; CHECK-P9-NEXT: blr
;
; CHECK-P8-LE-LABEL: ld_align16_vector:
; CHECK-P8-LE: # %bb.0: # %entry
@@ -96,8 +106,7 @@ entry:
define dso_local <16 x i8> @ld_unalign32_vector(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_unalign32_vector:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999
-; CHECK-P10-NEXT: lxvx v2, r3, r4
+; CHECK-P10-NEXT: plxv v2, 99999(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_unalign32_vector:
@@ -131,8 +140,7 @@ entry:
define dso_local <16 x i8> @ld_align32_vector(i8* nocapture readonly %ptr) {
; CHECK-P10-LABEL: ld_align32_vector:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: lxvx v2, r3, r4
+; CHECK-P10-NEXT: plxv v2, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_align32_vector:
@@ -350,12 +358,18 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local <16 x i8> @ld_disjoint_unalign16_vector(i64 %ptr) {
-; CHECK-LABEL: ld_disjoint_unalign16_vector:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: rldicr r3, r3, 0, 51
-; CHECK-NEXT: li r4, 6
-; CHECK-NEXT: lxvx v2, r3, r4
-; CHECK-NEXT: blr
+; CHECK-P10-LABEL: ld_disjoint_unalign16_vector:
+; CHECK-P10: # %bb.0: # %entry
+; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
+; CHECK-P10-NEXT: plxv v2, 6(r3), 0
+; CHECK-P10-NEXT: blr
+;
+; CHECK-P9-LABEL: ld_disjoint_unalign16_vector:
+; CHECK-P9: # %bb.0: # %entry
+; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
+; CHECK-P9-NEXT: li r4, 6
+; CHECK-P9-NEXT: lxvx v2, r3, r4
+; CHECK-P9-NEXT: blr
;
; CHECK-P8-LE-LABEL: ld_disjoint_unalign16_vector:
; CHECK-P8-LE: # %bb.0: # %entry
@@ -380,12 +394,18 @@ entry:
; Function Attrs: norecurse nounwind readonly uwtable willreturn
define dso_local <16 x i8> @ld_disjoint_align16_vector(i64 %ptr) {
-; CHECK-LABEL: ld_disjoint_align16_vector:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: rldicr r3, r3, 0, 51
-; CHECK-NEXT: li r4, 24
-; CHECK-NEXT: lxvx v2, r3, r4
-; CHECK-NEXT: blr
+; CHECK-P10-LABEL: ld_disjoint_align16_vector:
+; CHECK-P10: # %bb.0: # %entry
+; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
+; CHECK-P10-NEXT: plxv v2, 24(r3), 0
+; CHECK-P10-NEXT: blr
+;
+; CHECK-P9-LABEL: ld_disjoint_align16_vector:
+; CHECK-P9: # %bb.0: # %entry
+; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
+; CHECK-P9-NEXT: li r4, 24
+; CHECK-P9-NEXT: lxvx v2, r3, r4
+; CHECK-P9-NEXT: blr
;
; CHECK-P8-LE-LABEL: ld_disjoint_align16_vector:
; CHECK-P8-LE: # %bb.0: # %entry
@@ -442,8 +462,7 @@ define dso_local <16 x i8> @ld_disjoint_unalign32_vector(i64 %ptr) {
; CHECK-P10-LABEL: ld_disjoint_unalign32_vector:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: rldicr r3, r3, 0, 43
-; CHECK-P10-NEXT: pli r4, 99999
-; CHECK-P10-NEXT: lxvx v2, r3, r4
+; CHECK-P10-NEXT: plxv v2, 99999(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_unalign32_vector:
@@ -483,8 +502,7 @@ define dso_local <16 x i8> @ld_disjoint_align32_vector(i64 %ptr) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: lxvx v2, r3, r4
+; CHECK-P10-NEXT: plxv v2, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: ld_disjoint_align32_vector:
@@ -875,11 +893,16 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_unalign16_vector(i8* nocapture %ptr, <16 x i8> %str) {
-; CHECK-LABEL: st_unalign16_vector:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: li r4, 1
-; CHECK-NEXT: stxvx v2, r3, r4
-; CHECK-NEXT: blr
+; CHECK-P10-LABEL: st_unalign16_vector:
+; CHECK-P10: # %bb.0: # %entry
+; CHECK-P10-NEXT: pstxv v2, 1(r3), 0
+; CHECK-P10-NEXT: blr
+;
+; CHECK-P9-LABEL: st_unalign16_vector:
+; CHECK-P9: # %bb.0: # %entry
+; CHECK-P9-NEXT: li r4, 1
+; CHECK-P9-NEXT: stxvx v2, r3, r4
+; CHECK-P9-NEXT: blr
;
; CHECK-P8-LE-LABEL: st_unalign16_vector:
; CHECK-P8-LE: # %bb.0: # %entry
@@ -901,11 +924,16 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_align16_vector(i8* nocapture %ptr, <16 x i8> %str) {
-; CHECK-LABEL: st_align16_vector:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: li r4, 8
-; CHECK-NEXT: stxvx v2, r3, r4
-; CHECK-NEXT: blr
+; CHECK-P10-LABEL: st_align16_vector:
+; CHECK-P10: # %bb.0: # %entry
+; CHECK-P10-NEXT: pstxv v2, 8(r3), 0
+; CHECK-P10-NEXT: blr
+;
+; CHECK-P9-LABEL: st_align16_vector:
+; CHECK-P9: # %bb.0: # %entry
+; CHECK-P9-NEXT: li r4, 8
+; CHECK-P9-NEXT: stxvx v2, r3, r4
+; CHECK-P9-NEXT: blr
;
; CHECK-P8-LE-LABEL: st_align16_vector:
; CHECK-P8-LE: # %bb.0: # %entry
@@ -929,8 +957,7 @@ entry:
define dso_local void @st_unalign32_vector(i8* nocapture %ptr, <16 x i8> %str) {
; CHECK-P10-LABEL: st_unalign32_vector:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999
-; CHECK-P10-NEXT: stxvx v2, r3, r4
+; CHECK-P10-NEXT: pstxv v2, 99999(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_unalign32_vector:
@@ -964,8 +991,7 @@ entry:
define dso_local void @st_align32_vector(i8* nocapture %ptr, <16 x i8> %str) {
; CHECK-P10-LABEL: st_align32_vector:
; CHECK-P10: # %bb.0: # %entry
-; CHECK-P10-NEXT: pli r4, 99999000
-; CHECK-P10-NEXT: stxvx v2, r3, r4
+; CHECK-P10-NEXT: pstxv v2, 99999000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_align32_vector:
@@ -1183,12 +1209,18 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_disjoint_unalign16_vector(i64 %ptr, <16 x i8> %str) {
-; CHECK-LABEL: st_disjoint_unalign16_vector:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: rldicr r3, r3, 0, 51
-; CHECK-NEXT: li r4, 6
-; CHECK-NEXT: stxvx v2, r3, r4
-; CHECK-NEXT: blr
+; CHECK-P10-LABEL: st_disjoint_unalign16_vector:
+; CHECK-P10: # %bb.0: # %entry
+; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
+; CHECK-P10-NEXT: pstxv v2, 6(r3), 0
+; CHECK-P10-NEXT: blr
+;
+; CHECK-P9-LABEL: st_disjoint_unalign16_vector:
+; CHECK-P9: # %bb.0: # %entry
+; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
+; CHECK-P9-NEXT: li r4, 6
+; CHECK-P9-NEXT: stxvx v2, r3, r4
+; CHECK-P9-NEXT: blr
;
; CHECK-P8-LE-LABEL: st_disjoint_unalign16_vector:
; CHECK-P8-LE: # %bb.0: # %entry
@@ -1213,12 +1245,18 @@ entry:
; Function Attrs: nofree norecurse nounwind uwtable willreturn writeonly
define dso_local void @st_disjoint_align16_vector(i64 %ptr, <16 x i8> %str) {
-; CHECK-LABEL: st_disjoint_align16_vector:
-; CHECK: # %bb.0: # %entry
-; CHECK-NEXT: rldicr r3, r3, 0, 51
-; CHECK-NEXT: li r4, 24
-; CHECK-NEXT: stxvx v2, r3, r4
-; CHECK-NEXT: blr
+; CHECK-P10-LABEL: st_disjoint_align16_vector:
+; CHECK-P10: # %bb.0: # %entry
+; CHECK-P10-NEXT: rldicr r3, r3, 0, 51
+; CHECK-P10-NEXT: pstxv v2, 24(r3), 0
+; CHECK-P10-NEXT: blr
+;
+; CHECK-P9-LABEL: st_disjoint_align16_vector:
+; CHECK-P9: # %bb.0: # %entry
+; CHECK-P9-NEXT: rldicr r3, r3, 0, 51
+; CHECK-P9-NEXT: li r4, 24
+; CHECK-P9-NEXT: stxvx v2, r3, r4
+; CHECK-P9-NEXT: blr
;
; CHECK-P8-LE-LABEL: st_disjoint_align16_vector:
; CHECK-P8-LE: # %bb.0: # %entry
@@ -1275,8 +1313,7 @@ define dso_local void @st_disjoint_unalign32_vector(i64 %ptr, <16 x i8> %str) {
; CHECK-P10-LABEL: st_disjoint_unalign32_vector:
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: rldicr r3, r3, 0, 43
-; CHECK-P10-NEXT: pli r4, 99999
-; CHECK-P10-NEXT: stxvx v2, r3, r4
+; CHECK-P10-NEXT: pstxv v2, 99999(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_unalign32_vector:
@@ -1316,8 +1353,7 @@ define dso_local void @st_disjoint_align32_vector(i64 %ptr, <16 x i8> %str) {
; CHECK-P10: # %bb.0: # %entry
; CHECK-P10-NEXT: lis r4, -15264
; CHECK-P10-NEXT: and r3, r3, r4
-; CHECK-P10-NEXT: pli r4, 999990000
-; CHECK-P10-NEXT: stxvx v2, r3, r4
+; CHECK-P10-NEXT: pstxv v2, 999990000(r3), 0
; CHECK-P10-NEXT: blr
;
; CHECK-P9-LABEL: st_disjoint_align32_vector:
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