[PATCH] D109586: [ARM] Fold ARMISD::ADDC with no carry uses to ISD::ADD

[Dave Green via Phabricator via llvm-commits]

dmgreen created this revision.
dmgreen added reviewers: efriedma, SjoerdMeijer, samtebbs, simon_tatham, ostannard.
Herald added subscribers: hiraditya, kristof.beyls.
dmgreen requested review of this revision.
Herald added a project: LLVM.

An ARMISD::ADDC (which is really an ADDS), for which the flags (second output value) are never used is equivalent to a normal ADD. Same goes for ARMISD:SUBC -> SUB, which helps prevent an infinite loop during DAG combining.


https://reviews.llvm.org/D109586

Files:
  llvm/lib/Target/ARM/ARMISelLowering.cpp
  llvm/test/CodeGen/ARM/select_const.ll


Index: llvm/test/CodeGen/ARM/select_const.ll
===================================================================
--- llvm/test/CodeGen/ARM/select_const.ll
+++ llvm/test/CodeGen/ARM/select_const.ll
@@ -758,3 +758,52 @@
   ret i64 %bo
 }
 
+define i64 @func(i64 %arg) {
+; ARM-LABEL: func:
+; ARM:       @ %bb.0: @ %entry
+; ARM-NEXT:    adds r0, r0, #1
+; ARM-NEXT:    mov r2, #0
+; ARM-NEXT:    adcs r0, r1, #0
+; ARM-NEXT:    mov r1, #0
+; ARM-NEXT:    adcs r0, r2, #0
+; ARM-NEXT:    movne r0, #8
+; ARM-NEXT:    mov pc, lr
+;
+; THUMB2-LABEL: func:
+; THUMB2:       @ %bb.0: @ %entry
+; THUMB2-NEXT:    adds r0, #1
+; THUMB2-NEXT:    mov.w r2, #0
+; THUMB2-NEXT:    adcs r0, r1, #0
+; THUMB2-NEXT:    mov.w r1, #0
+; THUMB2-NEXT:    adcs r0, r2, #0
+; THUMB2-NEXT:    it ne
+; THUMB2-NEXT:    movne r0, #8
+; THUMB2-NEXT:    bx lr
+;
+; THUMB-LABEL: func:
+; THUMB:       @ %bb.0: @ %entry
+; THUMB-NEXT:    .save {r4, lr}
+; THUMB-NEXT:    push {r4, lr}
+; THUMB-NEXT:    movs r2, #0
+; THUMB-NEXT:    adds r3, r0, #1
+; THUMB-NEXT:    push {r1}
+; THUMB-NEXT:    pop {r3}
+; THUMB-NEXT:    adcs r3, r2
+; THUMB-NEXT:    push {r2}
+; THUMB-NEXT:    pop {r3}
+; THUMB-NEXT:    adcs r3, r2
+; THUMB-NEXT:    subs r4, r3, #1
+; THUMB-NEXT:    adds r0, r0, #1
+; THUMB-NEXT:    adcs r1, r2
+; THUMB-NEXT:    sbcs r3, r4
+; THUMB-NEXT:    lsls r0, r3, #3
+; THUMB-NEXT:    movs r1, r2
+; THUMB-NEXT:    pop {r4}
+; THUMB-NEXT:    pop {r2}
+; THUMB-NEXT:    bx r2
+entry:
+  %0 = add i64 %arg, 1
+  %1 = icmp ult i64 %0, 1
+  %2 = select i1 %1, i64 8, i64 0
+  ret i64 %2
+}
Index: llvm/lib/Target/ARM/ARMISelLowering.cpp
===================================================================
--- llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -12842,6 +12842,13 @@
                                       const ARMSubtarget *Subtarget) {
   SelectionDAG &DAG(DCI.DAG);
 
+  if (!N->hasAnyUseOfValue(1)) {
+    SDValue Add = DCI.DAG.getNode(
+        (N->getOpcode() == ARMISD::ADDC) ? ISD::ADD : ISD::SUB, SDLoc(N),
+        MVT::i32, N->getOperand(0), N->getOperand(1));
+    return DCI.CombineTo(N, Add, DCI.DAG.getUNDEF(MVT::i32));
+  }
+
   if (N->getOpcode() == ARMISD::SUBC) {
     // (SUBC (ADDE 0, 0, C), 1) -> C
     SDValue LHS = N->getOperand(0);


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