[PATCH] D109325: [ARM] Teach DemandedVectorElts about VMOVN lanes

[Dave Green via Phabricator via llvm-commits]

dmgreen added a comment.

In D109325#2989713 <https://reviews.llvm.org/D109325#2989713>, @SjoerdMeijer wrote:

> Before I continue reading the rest, just wanted to check this:
>
>> The class of instructions that write to narrow top/bottom lanes only demand the even or odd elements of the input lanes. Which means that VMOVNT; VMOVNB demands no lanes from the original input.
>
> I don't follow the conclusion here that the VMOVNT; VMOVNB don't demand lanes from the original input, because we do read from the original input?

Oh yeah, good point - the predicated intrinsics will not work this way if they are not acting on all lanes. I had forgotten that the first input is also the passthrough value. I'll update the patch to remove those.

For the non-predicated cases I mean to say - if you have overwritten the top lanes and you have overwritten the bottom lanes - then no value from the original input are demanded. You have overridden all the lanes. So a VMOVNT will demand the bottom (even) lanes from the first input and insert a new value into into the top (odd) lanes. A VMOVNB will demand the top (odd) lanes and write new values into the bottom. A pair of `X=VMOVNT A, B; Y= VMOVNB X, C` will use none of the lanes of `A`.


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