[PATCH] D108200: [llvm][sve] Lowering for VLS masked extending loads

David Truby via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Sep 9 06:38:57 PDT 2021


DavidTruby updated this revision to Diff 371578.
DavidTruby added a comment.

@paulwalker-arm sorry I think I misunderstood your comments before,
I believe the form I've changed the tests to now should be more what
you were expecting?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D108200/new/

https://reviews.llvm.org/D108200

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/lib/Target/AArch64/AArch64ISelLowering.cpp
  llvm/test/CodeGen/AArch64/sve-fixed-length-masked-loads.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D108200.371578.patch
Type: text/x-patch
Size: 27098 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20210909/455b0929/attachment-0001.bin>


More information about the llvm-commits mailing list